Quoting Tvrtko Ursulin (2017-09-11 16:25:49) > From: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx> > > Will be used for exposing the PMU counters. > > Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx> > --- > drivers/gpu/drm/i915/i915_drv.h | 8 +++++++- > drivers/gpu/drm/i915/intel_pm.c | 23 +++++++++-------------- > 2 files changed, 16 insertions(+), 15 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index d07d1109e784..dbd054e88ca2 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -4114,9 +4114,15 @@ void vlv_phy_reset_lanes(struct intel_encoder *encoder); > > int intel_gpu_freq(struct drm_i915_private *dev_priv, int val); > int intel_freq_opcode(struct drm_i915_private *dev_priv, int val); > -u64 intel_rc6_residency_us(struct drm_i915_private *dev_priv, > +u64 intel_rc6_residency_ns(struct drm_i915_private *dev_priv, > const i915_reg_t reg); > > +static inline u64 intel_rc6_residency_us(struct drm_i915_private *dev_priv, > + const i915_reg_t reg) > +{ > + return DIV_ROUND_UP_ULL(intel_rc6_residency_ns(dev_priv, reg), 1000); > +} > + > #define I915_READ8(reg) dev_priv->uncore.funcs.mmio_readb(dev_priv, (reg), true) > #define I915_WRITE8(reg, val) dev_priv->uncore.funcs.mmio_writeb(dev_priv, (reg), (val), true) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index fa9055a4f790..60461f49936b 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -9343,10 +9343,10 @@ static u64 vlv_residency_raw(struct drm_i915_private *dev_priv, > return lower | (u64)upper << 8; > } > > -u64 intel_rc6_residency_us(struct drm_i915_private *dev_priv, > +u64 intel_rc6_residency_ns(struct drm_i915_private *dev_priv, > const i915_reg_t reg) > { > - u64 time_hw, units, div; > + u64 res; > > if (!intel_enable_rc6()) > return 0; > @@ -9355,22 +9355,17 @@ u64 intel_rc6_residency_us(struct drm_i915_private *dev_priv, > > /* On VLV and CHV, residency time is in CZ units rather than 1.28us */ > if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { > - units = 1000; > - div = dev_priv->czclk_freq; > + res = vlv_residency_raw(dev_priv, reg); > + res = DIV_ROUND_UP_ULL(res * 1000000, dev_priv->czclk_freq); > > - time_hw = vlv_residency_raw(dev_priv, reg); > - } else if (IS_GEN9_LP(dev_priv)) { > - units = 1000; > - div = 1200; /* 833.33ns */ > - > - time_hw = I915_READ(reg); > } else { > - units = 128000; /* 1.28us */ > - div = 100000; > + /* 833.33ns units on Gen9LP, 1.28us elsewhere. */ > + unsigned int unit = IS_GEN9_LP(dev_priv) ? 833 : 1280; > > - time_hw = I915_READ(reg); > + res = (u64)I915_READ(reg) * unit; > } > > intel_runtime_pm_put(dev_priv); I was worried that you were going to assume that we took a wakeref in pmu, but I see that it keeps the if (intel_rpm_get_if_in_use() {} Should we push the rpm wakeref to the caller? intel_runtime_pm_get() isn't as simple as a single atomic op you would like it to be... -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx