Sorry. :) Too much stuffs comes together... -----Original Message----- From: Joonas Lahtinen [mailto:joonas.lahtinen@xxxxxxxxxxxxxxx] Sent: Wednesday, September 13, 2017 3:07 PM To: Wang, Zhi A <zhi.a.wang@xxxxxxxxx>; intel-gfx@xxxxxxxxxxxxxxxxxxxxx; intel-gvt-dev@xxxxxxxxxxxxxxxxxxxxx Cc: chris@xxxxxxxxxxxxxxxxxx; zhenyuw@xxxxxxxxxxxxxxx; Widawsky, Benjamin <benjamin.widawsky@xxxxxxxxx>; Vivi, Rodrigo <rodrigo.vivi@xxxxxxxxx> Subject: Re: [PATCH v16 1/4] drm/i915: Introduce private PAT management On Wed, 2017-09-13 at 16:44 +0800, Zhi Wang wrote: > The private PAT management is to support PPAT entry manipulation. Two > APIs are introduced for dynamically managing PPAT entries: > intel_ppat_get and intel_ppat_put. > > intel_ppat_get will search for an existing PPAT entry which perfectly > matches the required PPAT value. If not, it will try to allocate a new > entry if there is any available PPAT indexs, or return a partially > matched PPAT entry if there is no available PPAT indexes. > > intel_ppat_put will put back the PPAT entry which comes from > intel_ppat_get. If it's dynamically allocated, the reference count > will be decreased. If the reference count turns into zero, the PPAT > index is freed again. > > Besides, another two callbacks are introduced to support the private > PAT management framework. One is ppat->update_hw(), which writes the > PPAT configurations in ppat->entries into HW. Another one is > ppat->match, which will return a score to show how two PPAT values match with each other. > > v16: > > - Fix a bug in PPAT match function of BDW. (Joonas) > > v15: > > - Refine some code flow. (Joonas) > > v12: > > - Fix a problem "not returning the entry of best score". (Zhenyu) > > v7: > > - Keep all the register writes unchanged in this patch. (Joonas) > > v6: > > - Address all comments from Chris: > http://www.spinics.net/lists/intel-gfx/msg136850.html > > - Address all comments from Joonas: > http://www.spinics.net/lists/intel-gfx/msg136845.html > > v5: > > - Add check and warnnings for those platforms which don't have PPAT. > > v3: > > - Introduce dirty bitmap for PPAT registers. (Chris) > - Change the name of the pointer "dev_priv" to "i915". (Chris) > - intel_ppat_{get, put} returns/takes a const intel_ppat_entry *. > (Chris) > > v2: > > - API re-design. (Chris) > > Signed-off-by: Zhi Wang <zhi.a.wang@xxxxxxxxx> > Cc: Ben Widawsky <benjamin.widawsky@xxxxxxxxx> > Cc: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> > Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > Cc: Joonas Lahtinen <joonas.lahtinen@xxxxxxxxxxxxxxx> > Reviewed-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> #v7 > Reviewed-by: Joonas Lahtinen <joonas.lahtinen@xxxxxxxxxxxxxxx> <SNIP> > +static unsigned int bdw_private_pat_match(u8 src, u8 dst) { > + unsigned int score = 0; > + > + /* Cache attribute has to be matched. */ > + if (GEN8_PPAT_GET_CA(src) != GEN8_PPAT_GET_CA(dst)) > + return 0; > + > + score += 4; > + > + if (GEN8_PPAT_GET_TC(src) == GEN8_PPAT_GET_TC(dst)) > + score += 2; > + > + if (GEN8_PPAT_GET_AGE(src) == GEN8_PPAT_GET_AGE(dst)) > + score += 1; > + > + if (score == 3) > + return INTEL_PPAT_PERFECT_MATCH; This still needs to check for 7 to trigger the fast-path. A future-proof way would be; return score >= 7 ? INTEL_PPAT_PERFECT_MATCH : score; Regards, Joonas -- Joonas Lahtinen Open Source Technology Center Intel Corporation _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
