From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
Change the DVO pipe tracking to maintain a bitmask in the top level
state, just as we do for active_crtcs. This gets rid of the ugly
intel_num_dvo_pipes() and its crtc->state and crtc->config usage.
Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
---
drivers/gpu/drm/i915/i915_drv.h | 2 ++
drivers/gpu/drm/i915/intel_display.c | 33 ++++++++++++++++-----------------
drivers/gpu/drm/i915/intel_drv.h | 2 ++
3 files changed, 20 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index f8d7599cff43..a352644ea5a5 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2384,6 +2384,8 @@ struct drm_i915_private {
struct mutex dpll_lock;
u8 active_crtcs;
+ u8 dvo_pipes; /* bitmask of pipes driving DVO encoders */
+
/* minimum acceptable cdclk for each pipe */
int min_cdclk[I915_MAX_PIPES];
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index c33fce9d9824..cb32f264a5d4 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1555,19 +1555,6 @@ static void chv_enable_pll(struct intel_crtc *crtc,
}
}
-static int intel_num_dvo_pipes(struct drm_i915_private *dev_priv)
-{
- struct intel_crtc *crtc;
- int count = 0;
-
- for_each_intel_crtc(&dev_priv->drm, crtc) {
- count += crtc->base.state->active &&
- intel_crtc_has_type(crtc->config, INTEL_OUTPUT_DVO);
- }
-
- return count;
-}
-
static void i9xx_enable_pll(struct intel_crtc *crtc,
const struct intel_crtc_state *crtc_state)
{
@@ -1583,7 +1570,7 @@ static void i9xx_enable_pll(struct intel_crtc *crtc,
assert_panel_unlocked(dev_priv, crtc->pipe);
/* Enable DVO 2x clock on both PLLs if necessary */
- if (IS_I830(dev_priv) && intel_num_dvo_pipes(dev_priv) > 0) {
+ if (IS_I830(dev_priv) && dev_priv->dvo_pipes != 0) {
/*
* It appears to be important that we don't enable this
* for the current pipe before otherwise configuring the
@@ -1634,9 +1621,7 @@ static void i9xx_disable_pll(struct intel_crtc *crtc)
enum pipe pipe = crtc->pipe;
/* Disable DVO 2x clock on both PLLs if necessary */
- if (IS_I830(dev_priv) &&
- intel_crtc_has_type(crtc->config, INTEL_OUTPUT_DVO) &&
- !intel_num_dvo_pipes(dev_priv)) {
+ if (IS_I830(dev_priv) && dev_priv->dvo_pipes == 0) {
I915_WRITE(DPLL(PIPE_B),
I915_READ(DPLL(PIPE_B)) & ~DPLL_DVO_2X_MODE);
I915_WRITE(DPLL(PIPE_A),
@@ -6033,6 +6018,7 @@ static void intel_crtc_disable_noatomic(struct drm_crtc *crtc,
intel_crtc->enabled_power_domains = 0;
dev_priv->active_crtcs &= ~BIT(intel_crtc->pipe);
+ dev_priv->dvo_pipes &= ~BIT(intel_crtc->pipe);
dev_priv->min_cdclk[intel_crtc->pipe] = 0;
}
@@ -11951,6 +11937,7 @@ static int intel_modeset_checks(struct drm_atomic_state *state)
intel_state->modeset = true;
intel_state->active_crtcs = dev_priv->active_crtcs;
+ intel_state->dvo_pipes = dev_priv->dvo_pipes;
intel_state->cdclk.logical = dev_priv->cdclk.logical;
intel_state->cdclk.actual = dev_priv->cdclk.actual;
@@ -11960,6 +11947,12 @@ static int intel_modeset_checks(struct drm_atomic_state *state)
else
intel_state->active_crtcs &= ~BIT(crtc->pipe);
+ if (new_crtc_state->base.active &&
+ intel_crtc_has_type(new_crtc_state, INTEL_OUTPUT_DVO))
+ intel_state->dvo_pipes |= BIT(crtc->pipe);
+ else
+ intel_state->dvo_pipes &= ~BIT(crtc->pipe);
+
if (old_crtc_state->base.active != new_crtc_state->base.active)
intel_state->active_pipe_changes |= BIT(crtc->pipe);
}
@@ -12560,6 +12553,7 @@ static int intel_atomic_commit(struct drm_device *dev,
memcpy(dev_priv->min_cdclk, intel_state->min_cdclk,
sizeof(intel_state->min_cdclk));
dev_priv->active_crtcs = intel_state->active_crtcs;
+ dev_priv->dvo_pipes = intel_state->dvo_pipes;
dev_priv->cdclk.logical = intel_state->cdclk.logical;
dev_priv->cdclk.actual = intel_state->cdclk.actual;
}
@@ -14935,6 +14929,7 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
int i;
dev_priv->active_crtcs = 0;
+ dev_priv->dvo_pipes = 0;
for_each_intel_crtc(dev, crtc) {
struct intel_crtc_state *crtc_state =
@@ -14992,6 +14987,10 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
encoder->base.crtc = &crtc->base;
crtc_state->output_types |= 1 << encoder->type;
encoder->get_config(encoder, crtc_state);
+
+ if (crtc_state->base.active &&
+ intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DVO))
+ dev_priv->dvo_pipes |= BIT(crtc->pipe);
} else {
encoder->base.crtc = NULL;
}
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 96f683256d7e..15ec6076e6a0 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -384,6 +384,8 @@ struct intel_atomic_state {
u8 active_pipe_changes;
u8 active_crtcs;
+ u8 dvo_pipes; /* bitmask of pipes driving DVO encoders */
+
/* minimum acceptable cdclk for each pipe */
int min_cdclk[I915_MAX_PIPES];
--
2.13.5
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