When first execlist entry is processed, we move the port (contents). Introduce function for this as execlist, guc and reset handling use this common operation. Signed-off-by: Mika Kuoppala <mika.kuoppala@xxxxxxxxx> --- drivers/gpu/drm/i915/i915_guc_submission.c | 12 ++++++------ drivers/gpu/drm/i915/intel_lrc.c | 28 ++++++++++++++-------------- drivers/gpu/drm/i915/intel_ringbuffer.h | 14 +++++++++++++- 3 files changed, 33 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c index f95defe18885..336d22ea5216 100644 --- a/drivers/gpu/drm/i915/i915_guc_submission.c +++ b/drivers/gpu/drm/i915/i915_guc_submission.c @@ -691,7 +691,7 @@ static bool i915_guc_dequeue(struct intel_engine_cs *engine) rq->priotree.priority = INT_MAX; i915_guc_submit(rq); - trace_i915_gem_request_in(rq, port_index(port, engine)); + trace_i915_gem_request_in(rq, port_index(port, el)); last = rq; submit = true; } @@ -714,20 +714,20 @@ static bool i915_guc_dequeue(struct intel_engine_cs *engine) static void i915_guc_irq_handler(unsigned long data) { struct intel_engine_cs * const engine = (struct intel_engine_cs *)data; - struct execlist_port *port = engine->execlist.port; + struct intel_engine_execlist * const el = &engine->execlist; + struct execlist_port *port = el->port; struct drm_i915_gem_request *rq; bool submit; do { - rq = port_request(&port[0]); + rq = port_request(port); while (rq && i915_gem_request_completed(rq)) { trace_i915_gem_request_out(rq); i915_gem_request_put(rq); - port[0] = port[1]; - memset(&port[1], 0, sizeof(port[1])); + execlist_port_complete(el, port); - rq = port_request(&port[0]); + rq = port_request(port); } submit = false; diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 7dc893806b43..73626dbcef50 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -398,7 +398,8 @@ static void port_assign(struct execlist_port *port, static void execlists_dequeue(struct intel_engine_cs *engine) { struct drm_i915_gem_request *last; - struct execlist_port *port = engine->execlist.port; + struct intel_engine_execlist * const el = &engine->execlist; + struct execlist_port *port = el->port; struct rb_node *rb; bool submit = false; @@ -412,8 +413,6 @@ static void execlists_dequeue(struct intel_engine_cs *engine) */ last->tail = last->wa_tail; - GEM_BUG_ON(port_isset(&port[1])); - /* Hardware submission is through 2 ports. Conceptually each port * has a (RING_START, RING_HEAD, RING_TAIL) tuple. RING_START is * static for a context, and unique to each, so we only execute @@ -436,8 +435,8 @@ static void execlists_dequeue(struct intel_engine_cs *engine) */ spin_lock_irq(&engine->timeline->lock); - rb = engine->execlist.first; - GEM_BUG_ON(rb_first(&engine->execlist.queue) != rb); + rb = el->first; + GEM_BUG_ON(rb_first(&el->queue) != rb); while (rb) { struct i915_priolist *p = rb_entry(rb, typeof(*p), node); struct drm_i915_gem_request *rq, *rn; @@ -460,7 +459,7 @@ static void execlists_dequeue(struct intel_engine_cs *engine) * combine this request with the last, then we * are done. */ - if (port != engine->execlist.port) { + if (port != el->port) { __list_del_many(&p->requests, &rq->priotree.link); goto done; @@ -485,25 +484,27 @@ static void execlists_dequeue(struct intel_engine_cs *engine) if (submit) port_assign(port, last); port++; + + GEM_BUG_ON(port_isset(port)); } INIT_LIST_HEAD(&rq->priotree.link); rq->priotree.priority = INT_MAX; __i915_gem_request_submit(rq); - trace_i915_gem_request_in(rq, port_index(port, engine)); + trace_i915_gem_request_in(rq, port_index(port, el)); last = rq; submit = true; } rb = rb_next(rb); - rb_erase(&p->node, &engine->execlist.queue); + rb_erase(&p->node, &el->queue); INIT_LIST_HEAD(&p->requests); if (p->priority != I915_PRIORITY_NORMAL) kmem_cache_free(engine->i915->priorities, p); } done: - engine->execlist.first = rb; + el->first = rb; if (submit) port_assign(port, last); spin_unlock_irq(&engine->timeline->lock); @@ -609,8 +610,7 @@ static void intel_lrc_irq_handler(unsigned long data) trace_i915_gem_request_out(rq); i915_gem_request_put(rq); - port[0] = port[1]; - memset(&port[1], 0, sizeof(port[1])); + execlist_port_complete(el, port); } else { port_set(port, port_pack(rq, count)); } @@ -1329,7 +1329,8 @@ static int gen9_init_render_ring(struct intel_engine_cs *engine) static void reset_common_ring(struct intel_engine_cs *engine, struct drm_i915_gem_request *request) { - struct execlist_port *port = engine->execlist.port; + struct intel_engine_execlist * const el = &engine->execlist; + struct execlist_port *port = el->port; struct intel_context *ce; /* @@ -1348,8 +1349,7 @@ static void reset_common_ring(struct intel_engine_cs *engine, if (request->ctx != port_request(port)->ctx) { i915_gem_request_put(port_request(port)); - port[0] = port[1]; - memset(&port[1], 0, sizeof(port[1])); + execlist_port_complete(el, port); } GEM_BUG_ON(request->ctx != port_request(port)->ctx); diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h index ae921f916c89..d7a941fc3f87 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.h +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h @@ -228,7 +228,7 @@ struct intel_engine_execlist { #define port_unpack(p, count) ptr_unpack_bits((p)->request_count, count, EXECLIST_COUNT_BITS) #define port_set(p, packed) ((p)->request_count = (packed)) #define port_isset(p) ((p)->request_count) -#define port_index(p, e) ((p) - (e)->execlist.port) +#define port_index(p, el) ((p) - (el)->port) /** * @context_id: context ID for port @@ -495,6 +495,18 @@ struct intel_engine_cs { void execlist_cancel_port_requests(struct intel_engine_execlist * const el); +static inline void +execlist_port_complete(struct intel_engine_execlist * const el, + struct execlist_port * const port) +{ + struct execlist_port * const port1 = &el->port[1]; + + GEM_DEBUG_BUG_ON(port_index(port, el) != 0); + + *port = *port1; + memset(port1, 0, sizeof(struct execlist_port)); +} + static inline unsigned int intel_engine_flag(const struct intel_engine_cs *engine) { -- 2.11.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx