GuC can handle more than two submission ports. Make port count
variable to prepare supporting more than 2 ports.
Signed-off-by: Mika Kuoppala <mika.kuoppala@xxxxxxxxx>
---
drivers/gpu/drm/i915/i915_debugfs.c | 8 ++++----
drivers/gpu/drm/i915/i915_drv.h | 3 ++-
drivers/gpu/drm/i915/i915_gpu_error.c | 17 ++++++++++++-----
drivers/gpu/drm/i915/i915_guc_submission.c | 8 ++++++--
drivers/gpu/drm/i915/intel_lrc.c | 24 ++++++++++++++++--------
drivers/gpu/drm/i915/intel_ringbuffer.h | 23 ++++++++++++++++++-----
6 files changed, 58 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index cc36409936dc..77ac775e312d 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -3315,6 +3315,7 @@ static int i915_engine_info(struct seq_file *m, void *unused)
upper_32_bits(addr), lower_32_bits(addr));
if (i915.enable_execlists) {
+ struct intel_engine_execlist * const el = &engine->execlist;
u32 ptr, read, write;
unsigned int idx;
@@ -3344,11 +3345,10 @@ static int i915_engine_info(struct seq_file *m, void *unused)
}
rcu_read_lock();
- for (idx = 0; idx < ARRAY_SIZE(engine->execlist.port); idx++) {
+ for (idx = 0; idx < execlist_num_ports(el); idx++) {
unsigned int count;
- rq = port_unpack(&engine->execlist.port[idx],
- &count);
+ rq = port_unpack(&el->port[idx], &count);
if (rq) {
seq_printf(m, "\t\tELSP[%d] count=%d, ",
idx, count);
@@ -3361,7 +3361,7 @@ static int i915_engine_info(struct seq_file *m, void *unused)
rcu_read_unlock();
spin_lock_irq(&engine->timeline->lock);
- for (rb = engine->execlist.first; rb; rb = rb_next(rb)) {
+ for (rb = el->first; rb; rb = rb_next(rb)) {
struct i915_priolist *p =
rb_entry(rb, typeof(*p), node);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 1cc31a5b049f..fd068ac66388 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1001,7 +1001,8 @@ struct i915_gpu_state {
u32 seqno;
u32 head;
u32 tail;
- } *requests, execlist[2];
+ } *requests, execlist[EXECLIST_MAX_PORTS];
+ unsigned int num_ports;
struct drm_i915_error_waiter {
char comm[TASK_COMM_LEN];
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
index 6114bf79219d..e048d713f72c 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -396,6 +396,8 @@ static void error_print_context(struct drm_i915_error_state_buf *m,
static void error_print_engine(struct drm_i915_error_state_buf *m,
const struct drm_i915_error_engine *ee)
{
+ int n;
+
err_printf(m, "%s command stream:\n", engine_str(ee->engine_id));
err_printf(m, " START: 0x%08x\n", ee->start);
err_printf(m, " HEAD: 0x%08x [0x%08x]\n", ee->head, ee->rq_head);
@@ -465,8 +467,11 @@ static void error_print_engine(struct drm_i915_error_state_buf *m,
jiffies_to_msecs(jiffies - ee->hangcheck_timestamp));
err_printf(m, " engine reset count: %u\n", ee->reset_count);
- error_print_request(m, " ELSP[0]: ", &ee->execlist[0]);
- error_print_request(m, " ELSP[1]: ", &ee->execlist[1]);
+ for (n = 0; n < ee->num_ports; n++) {
+ err_printf(m, " ELSP[%d]:", n);
+ error_print_request(m, " ", &ee->execlist[n]);
+ }
+
error_print_context(m, " Active context: ", &ee->context);
}
@@ -1327,17 +1332,19 @@ static void engine_record_requests(struct intel_engine_cs *engine,
static void error_record_engine_execlists(struct intel_engine_cs *engine,
struct drm_i915_error_engine *ee)
{
- const struct execlist_port *port = engine->execlist.port;
+ const struct intel_engine_execlist * const el = &engine->execlist;
unsigned int n;
- for (n = 0; n < ARRAY_SIZE(engine->execlist.port); n++) {
- struct drm_i915_gem_request *rq = port_request(&port[n]);
+ for (n = 0; n < execlist_num_ports(el); n++) {
+ struct drm_i915_gem_request *rq = port_request(&el->port[n]);
if (!rq)
break;
record_request(rq, &ee->execlist[n]);
}
+
+ ee->num_ports = n;
}
static void record_context(struct drm_i915_error_context *e,
diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c
index 336d22ea5216..c38a3e71e285 100644
--- a/drivers/gpu/drm/i915/i915_guc_submission.c
+++ b/drivers/gpu/drm/i915/i915_guc_submission.c
@@ -663,6 +663,8 @@ static bool i915_guc_dequeue(struct intel_engine_cs *engine)
{
struct intel_engine_execlist * const el = &engine->execlist;
struct execlist_port *port = el->port;
+ const struct execlist_port * const last_port =
+ &el->port[el->port_mask];
struct drm_i915_gem_request *last = port_request(port);
struct rb_node *rb;
bool submit = false;
@@ -676,7 +678,7 @@ static bool i915_guc_dequeue(struct intel_engine_cs *engine)
list_for_each_entry_safe(rq, rn, &p->requests, priotree.link) {
if (last && rq->ctx != last->ctx) {
- if (port != el->port) {
+ if (port == last_port) {
__list_del_many(&p->requests,
&rq->priotree.link);
goto done;
@@ -716,6 +718,8 @@ static void i915_guc_irq_handler(unsigned long data)
struct intel_engine_cs * const engine = (struct intel_engine_cs *)data;
struct intel_engine_execlist * const el = &engine->execlist;
struct execlist_port *port = el->port;
+ const struct execlist_port * const last_port =
+ &el->port[el->port_mask];
struct drm_i915_gem_request *rq;
bool submit;
@@ -731,7 +735,7 @@ static void i915_guc_irq_handler(unsigned long data)
}
submit = false;
- if (!port_count(&port[1]))
+ if (!port_count(last_port))
submit = i915_guc_dequeue(engine);
} while (submit);
}
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 73626dbcef50..4752d71dd644 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -343,7 +343,7 @@ static void execlists_submit_ports(struct intel_engine_cs *engine)
engine->i915->regs + i915_mmio_reg_offset(RING_ELSP(engine));
unsigned int n;
- for (n = ARRAY_SIZE(engine->execlist.port); n--; ) {
+ for (n = execlist_num_ports(&engine->execlist); n--; ) {
struct drm_i915_gem_request *rq;
unsigned int count;
u64 desc;
@@ -400,6 +400,8 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
struct drm_i915_gem_request *last;
struct intel_engine_execlist * const el = &engine->execlist;
struct execlist_port *port = el->port;
+ const struct execlist_port * const last_port =
+ &el->port[el->port_mask];
struct rb_node *rb;
bool submit = false;
@@ -459,7 +461,7 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
* combine this request with the last, then we
* are done.
*/
- if (port != el->port) {
+ if (port == last_port) {
__list_del_many(&p->requests,
&rq->priotree.link);
goto done;
@@ -1236,7 +1238,7 @@ static u8 gtiir[] = {
static int gen8_init_common_ring(struct intel_engine_cs *engine)
{
struct drm_i915_private *dev_priv = engine->i915;
- struct execlist_port *port = engine->execlist.port;
+ struct intel_engine_execlist * const el = &engine->execlist;
unsigned int n;
bool submit;
int ret;
@@ -1274,16 +1276,18 @@ static int gen8_init_common_ring(struct intel_engine_cs *engine)
/* After a GPU reset, we may have requests to replay */
submit = false;
- for (n = 0; n < ARRAY_SIZE(engine->execlist.port); n++) {
- if (!port_isset(&port[n]))
+ for (n = 0; n < execlist_num_ports(el); n++) {
+ struct execlist_port * const port = &el->port[n];
+
+ if (!port_isset(port))
break;
DRM_DEBUG_DRIVER("Restarting %s:%d from 0x%x\n",
engine->name, n,
- port_request(&port[n])->global_seqno);
+ port_request(port)->global_seqno);
/* Discard the current inflight count */
- port_set(&port[n], port_request(&port[n]));
+ port_set(port, port_request(port));
submit = true;
}
@@ -1343,7 +1347,7 @@ static void reset_common_ring(struct intel_engine_cs *engine,
* requests were completed.
*/
if (!request) {
- execlist_cancel_port_requests(&engine->execlist);
+ execlist_cancel_port_requests(el);
return;
}
@@ -1759,6 +1763,10 @@ logical_ring_setup(struct intel_engine_cs *engine)
/* Intentionally left blank. */
engine->buffer = NULL;
+ engine->execlist.port_mask = 1;
+ BUILD_BUG_ON_NOT_POWER_OF_2(execlist_num_ports(&engine->execlist));
+ GEM_BUG_ON(execlist_num_ports(&engine->execlist) > EXECLIST_MAX_PORTS);
+
fw_domains = intel_uncore_forcewake_for_reg(dev_priv,
RING_ELSP(engine),
FW_REG_WRITE);
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index d7a941fc3f87..7b64e5e16136 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -234,7 +234,14 @@ struct intel_engine_execlist {
* @context_id: context ID for port
*/
GEM_DEBUG_DECL(u32 context_id);
- } port[2];
+
+#define EXECLIST_MAX_PORTS 2
+ } port[EXECLIST_MAX_PORTS];
+
+ /**
+ * @port_mask: number of execlist ports - 1
+ */
+ unsigned int port_mask;
/**
* @queue: queue of requests, in priority lists
@@ -493,20 +500,26 @@ struct intel_engine_cs {
u32 (*get_cmd_length_mask)(u32 cmd_header);
};
-void execlist_cancel_port_requests(struct intel_engine_execlist * const el);
+static inline unsigned int
+execlist_num_ports(const struct intel_engine_execlist * const el)
+{
+ return el->port_mask + 1;
+}
static inline void
execlist_port_complete(struct intel_engine_execlist * const el,
struct execlist_port * const port)
{
- struct execlist_port * const port1 = &el->port[1];
+ const unsigned int m = el->port_mask;
GEM_DEBUG_BUG_ON(port_index(port, el) != 0);
- *port = *port1;
- memset(port1, 0, sizeof(struct execlist_port));
+ memmove(port, port + 1, m * sizeof(struct execlist_port));
+ memset(port + m, 0, sizeof(struct execlist_port));
}
+void execlist_cancel_port_requests(struct intel_engine_execlist * const el);
+
static inline unsigned int
intel_engine_flag(const struct intel_engine_cs *engine)
{
--
2.11.0
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