Re: [PATCH] drm/i915: Disable DRRS when PSR is enabled

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> -----Original Message-----
> From: Daniel Vetter [mailto:daniel.vetter@xxxxxxxx] On Behalf Of Daniel
> Vetter
> Sent: Monday, September 4, 2017 1:14 AM
> To: Sripada, Radhakrishna <radhakrishna.sripada@xxxxxxxxx>
> Cc: Vivi, Rodrigo <rodrigo.vivi@xxxxxxxxx>; Nikula, Jani
> <jani.nikula@xxxxxxxxx>; intel-gfx@xxxxxxxxxxxxxxxxxxxxx; Pandiyan,
> Dhinakaran <dhinakaran.pandiyan@xxxxxxxxx>;
> nicholas.stommel@xxxxxxxxx
> Subject: Re:  [PATCH] drm/i915: Disable DRRS when PSR is enabled
> 
> On Thu, Aug 31, 2017 at 05:37:31PM +0000, Sripada, Radhakrishna wrote:
> >
> >
> > > -----Original Message-----
> > > From: Vivi, Rodrigo
> > > Sent: Wednesday, August 30, 2017 5:59 PM
> > > To: Sripada, Radhakrishna <radhakrishna.sripada@xxxxxxxxx>
> > > Cc: intel-gfx@xxxxxxxxxxxxxxxxxxxxx; Pandiyan, Dhinakaran
> > > <dhinakaran.pandiyan@xxxxxxxxx>; Nikula, Jani
> > > <jani.nikula@xxxxxxxxx>; Taylor, Clinton A
> > > <clinton.a.taylor@xxxxxxxxx>; nicholas.stommel@xxxxxxxxx
> > > Subject: Re: [PATCH] drm/i915: Disable DRRS when PSR is enabled
> > >
> > > On Wed, 2017-08-30 at 17:32 -0700, Radhakrishna Sripada wrote:
> > > > Some platforms donot support PSR and DRRS simultaneously.
> > > > Deferring to PSR when both PSR and DRRS are supported by the panel.
> > > >
> > > > Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=101111
> > >
> > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101111
> > >
> > > "Fixes: <commit>" is only used to -fixes cherry-picks. Not a case
> > > for this patch.
> > Got it. Will update in the next revision of the patch.
> 
> Did you check igt coverage for this and make sure those platforms do blow
> up somewhere?
Currently there is no igt test coverage to check if both psr and drrs are enabled at
the same time. I will add it as a subtest in tests/kms_psr_sink_crc if you prefer.
-Radhakrishna
> 
> We currently don't yet run the full panel tests (psr, drrs) in CI, but we're
> slowly working on that problem too. Would be good to have the testsuite
> ready already.
> -Daniel
> 
> > >
> > > > Cc: Nicholas Stommel <nicholas.stommel@xxxxxxxxx>
> > > > Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@xxxxxxxxx>
> > > > Cc: Jani Nikula <jani.nikula@xxxxxxxxx>
> > > > Cc: Clinton Taylor <clinton.a.taylor@xxxxxxxxx>
> > > > Cc: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
> > > > Signed-off-by: Radhakrishna Sripada
> > > > <radhakrishna.sripada@xxxxxxxxx>
> > > > ---
> > > >  drivers/gpu/drm/i915/intel_dp.c | 10 +++++-----
> > > >  1 file changed, 5 insertions(+), 5 deletions(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/i915/intel_dp.c
> > > > b/drivers/gpu/drm/i915/intel_dp.c index d3e5fdf0d2fa..dc7a6721e0dd
> > > > 100644
> > > > --- a/drivers/gpu/drm/i915/intel_dp.c
> > > > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > > > @@ -5469,11 +5469,6 @@ static void intel_dp_set_drrs_state(struct
> > > drm_i915_private *dev_priv,
> > > >  		return;
> > > >  	}
> > > >
> > > > -	/*
> > > > -	 * FIXME: This needs proper synchronization with psr state for some
> > > > -	 * platforms that cannot have PSR and DRRS enabled at the same
> > > time.
> > > > -	 */
> > > > -
> > > >  	dig_port = dp_to_dig_port(intel_dp);
> > > >  	encoder = &dig_port->base;
> > > >  	intel_crtc = to_intel_crtc(encoder->base.crtc);
> > > > @@ -5557,6 +5552,11 @@ void intel_edp_drrs_enable(struct intel_dp
> > > *intel_dp,
> > > >  		return;
> > > >  	}
> > > >
> > > > +	if (dev_priv->psr.enabled != NULL) {
> > >
> > > 	if (dev_priv->psr.enabled) {
> > > ?
> > This looks cleaner will use this in the follow up patch.
> > >
> > > > +		DRM_DEBUG_KMS("PSR active. Disabling DRRS.\n");
> > > > +		return;
> > > > +	}
> > > > +
> > > >  	mutex_lock(&dev_priv->drrs.mutex);
> > > >  	if (WARN_ON(dev_priv->drrs.dp)) {
> > > >  		DRM_ERROR("DRRS already enabled\n");
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> --
> Daniel Vetter
> Software Engineer, Intel Corporation
> http://blog.ffwll.ch
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