From: "Kamble, Sagar A" <sagar.a.kamble@xxxxxxxxx>
Teardown of GuC HW/SW state was not properly done in unload path.
guc_submission_disable was called as part of intel_uc_fini_hw which
happens post gem_unload in the i915_driver_unload path.
To differentiate the tasks during suspend and load w.r.t GuC this
patch introduces new function i915_gem_unload which in addition to
disabling GuC interfaces also disables GuC submission during which
GuC communication with GuC is needed for destroying doorbell.
i915_gem_unload is copy of i915_gem_suspend with difference w.r.t
GuC operations. To achieve this, new helpers i915_gem_context_suspend
and i915_gem_suspend_complete are prepared.
This patch updates the functions responsibilities as follows:
1. intel_uc_unload: Disable all things that involve communication with
GuC and internal operation of GuC firmware, currently submission.
Post this disable all other state like guc_ggtt_invalidate,
guc_communication and guc_interrupts.
2. intel_uc_fini_hw: Free up all UC related memory and other data.
v2: Prepared i915_gem_unload. (Michal)
v3: Moved guc_free_load_err_log past i915.enable_guc_loading check in
intel_uc_cleanup_hw. Prepared i915_gem_contexts_suspend and
i915_gem_suspend_complete that are used in the two paths
i915_gem_suspend and i915_gem_unload. Unload specific actions like
disabling GuC submission and GuC communication are being done in
i915_gem_unload. Commit message update. (Michał Winiarski)
Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
Cc: Michal Wajdeczko <michal.wajdeczko@xxxxxxxxx>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@xxxxxxxxx>
Cc: Michał Winiarski <michal.winiarski@xxxxxxxxx>
Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@xxxxxxxxx>
---
drivers/gpu/drm/i915/i915_drv.c | 4 ++--
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/i915_gem.c | 52 ++++++++++++++++++++++++++++++++++++----
drivers/gpu/drm/i915/intel_guc.c | 13 ++++++++++
drivers/gpu/drm/i915/intel_guc.h | 1 +
drivers/gpu/drm/i915/intel_uc.c | 18 ++++++--------
drivers/gpu/drm/i915/intel_uc.h | 1 +
7 files changed, 72 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index d70a160..001bff2 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -682,7 +682,7 @@ static int i915_load_modeset_init(struct drm_device *dev)
return 0;
cleanup_gem:
- if (i915_gem_suspend(dev_priv))
+ if (i915_gem_unload(dev_priv))
DRM_ERROR("failed to idle hardware; continuing to unload!\n");
i915_gem_fini(dev_priv);
cleanup_uc:
@@ -1375,7 +1375,7 @@ void i915_driver_unload(struct drm_device *dev)
i915_driver_unregister(dev_priv);
- if (i915_gem_suspend(dev_priv))
+ if (i915_gem_unload(dev_priv))
DRM_ERROR("failed to idle hardware; continuing to unload!\n");
intel_display_power_get(dev_priv, POWER_DOMAIN_INIT);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index d0a9c18..9333e1c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3661,6 +3661,7 @@ void i915_gem_reset_engine(struct intel_engine_cs *engine,
int i915_gem_wait_for_idle(struct drm_i915_private *dev_priv,
unsigned int flags);
int __must_check i915_gem_suspend(struct drm_i915_private *dev_priv);
+int __must_check i915_gem_unload(struct drm_i915_private *dev_priv);
void i915_gem_resume(struct drm_i915_private *dev_priv);
int i915_gem_fault(struct vm_fault *vmf);
int i915_gem_object_wait(struct drm_i915_gem_object *obj,
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 306e42a..29509d0 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4545,12 +4545,11 @@ void i915_gem_sanitize(struct drm_i915_private *i915)
}
}
-int i915_gem_suspend(struct drm_i915_private *dev_priv)
+static int i915_gem_contexts_suspend(struct drm_i915_private *dev_priv)
{
struct drm_device *dev = &dev_priv->drm;
int ret;
- intel_runtime_pm_get(dev_priv);
intel_suspend_gt_powersave(dev_priv);
mutex_lock(&dev->struct_mutex);
@@ -4577,8 +4576,15 @@ int i915_gem_suspend(struct drm_i915_private *dev_priv)
i915_gem_contexts_lost(dev_priv);
mutex_unlock(&dev->struct_mutex);
- intel_guc_system_suspend(&dev_priv->guc);
+ return 0;
+
+err_unlock:
+ mutex_unlock(&dev->struct_mutex);
+ return ret;
+}
+static void i915_gem_suspend_complete(struct drm_i915_private *dev_priv)
+{
cancel_delayed_work_sync(&dev_priv->gpu_error.hangcheck_work);
cancel_delayed_work_sync(&dev_priv->gt.retire_work);
@@ -4615,12 +4621,48 @@ int i915_gem_suspend(struct drm_i915_private *dev_priv)
* machine in an unusable condition.
*/
i915_gem_sanitize(dev_priv);
+}
+
+int i915_gem_suspend(struct drm_i915_private *dev_priv)
+{
+ int ret;
+
+ intel_runtime_pm_get(dev_priv);
+
+ ret = i915_gem_contexts_suspend(dev_priv);
+ if (ret && ret != -EIO)
+ goto err_suspend;
+
+ intel_guc_system_suspend(&dev_priv->guc);
+
+ i915_gem_suspend_complete(dev_priv);
intel_runtime_pm_put(dev_priv);
return 0;
-err_unlock:
- mutex_unlock(&dev->struct_mutex);
+err_suspend:
+ intel_runtime_pm_put(dev_priv);
+ return ret;
+}
+
+int i915_gem_unload(struct drm_i915_private *dev_priv)
+{
+ int ret;
+
+ intel_runtime_pm_get(dev_priv);
+
+ ret = i915_gem_contexts_suspend(dev_priv);
+ if (ret && ret != -EIO)
+ goto err_suspend;
+
+ intel_uc_unload(dev_priv);
+
+ i915_gem_suspend_complete(dev_priv);
+
+ intel_runtime_pm_put(dev_priv);
+ return 0;
+
+err_suspend:
intel_runtime_pm_put(dev_priv);
return ret;
}
diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c
index b957dab..178d8e4 100644
--- a/drivers/gpu/drm/i915/intel_guc.c
+++ b/drivers/gpu/drm/i915/intel_guc.c
@@ -333,3 +333,16 @@ int intel_guc_system_resume(struct intel_guc *guc)
*/
return ret;
}
+
+void intel_guc_unload(struct intel_guc *guc)
+{
+ struct drm_i915_private *dev_priv = guc_to_i915(guc);
+ struct drm_device *dev = &dev_priv->drm;
+
+ if (i915.enable_guc_submission) {
+ mutex_lock(&dev->struct_mutex);
+ i915_guc_submission_disable(dev_priv);
+ mutex_unlock(&dev->struct_mutex);
+ intel_guc_reset_prepare(guc);
+ }
+}
diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h
index 49bab33..d99a2cd 100644
--- a/drivers/gpu/drm/i915/intel_guc.h
+++ b/drivers/gpu/drm/i915/intel_guc.h
@@ -164,6 +164,7 @@ static inline u32 guc_ggtt_offset(struct i915_vma *vma)
int intel_guc_runtime_resume(struct intel_guc *guc);
int intel_guc_system_suspend(struct intel_guc *guc);
int intel_guc_system_resume(struct intel_guc *guc);
+void intel_guc_unload(struct intel_guc *guc);
static inline int intel_guc_send(struct intel_guc *guc, const u32 *action,
u32 len)
diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index 30c004c..65561b4 100644
--- a/drivers/gpu/drm/i915/intel_uc.c
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -379,22 +379,18 @@ int intel_uc_init_hw(struct drm_i915_private *dev_priv)
return ret;
}
-void intel_uc_fini_hw(struct drm_i915_private *dev_priv)
+void intel_uc_unload(struct drm_i915_private *dev_priv)
{
- guc_free_load_err_log(&dev_priv->guc);
+ intel_guc_unload(&dev_priv->guc);
+}
+void intel_uc_fini_hw(struct drm_i915_private *dev_priv)
+{
if (!i915.enable_guc_loading)
return;
- if (i915.enable_guc_submission)
- i915_guc_submission_disable(dev_priv);
-
- intel_guc_disable_communication(&dev_priv->guc);
+ guc_free_load_err_log(&dev_priv->guc);
- if (i915.enable_guc_submission) {
- gen9_disable_guc_interrupts(dev_priv);
+ if (i915.enable_guc_submission)
i915_guc_submission_fini(dev_priv);
- }
-
- i915_ggtt_disable_guc(dev_priv);
}
diff --git a/drivers/gpu/drm/i915/intel_uc.h b/drivers/gpu/drm/i915/intel_uc.h
index 0d346ef..0413a66 100644
--- a/drivers/gpu/drm/i915/intel_uc.h
+++ b/drivers/gpu/drm/i915/intel_uc.h
@@ -104,6 +104,7 @@ struct intel_uc_fw {
void intel_uc_init_fw(struct drm_i915_private *dev_priv);
void intel_uc_fini_fw(struct drm_i915_private *dev_priv);
int intel_uc_init_hw(struct drm_i915_private *dev_priv);
+void intel_uc_unload(struct drm_i915_private *dev_priv);
void intel_uc_fini_hw(struct drm_i915_private *dev_priv);
#endif
--
1.9.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
