On Tue, Sep 05, 2017 at 07:04:44PM +0000, Vivi, Rodrigo wrote: > On Tue, 2017-09-05 at 11:45 -0700, Nanley Chery wrote: > > From: Ben Widawsky <benjamin.widawsky@xxxxxxxxx> > > Do we have a signed-off by him? > Maybe go with you as author and suggested-by Ben? > He's good with the second option. Should I send a v2? > > > > This enables the Mesa driver to advertise support for ARB_timer_query, and > > thus an OpenGL version higher than 3.2. > > > > I tried to check if this patch should be a "Fixes:" for a previous one, > but I didn't find anyone that this patch would fit. Just a forgotten > case. > > > Cc: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> > > Signed-off-by: Nanley Chery <nanley.g.chery@xxxxxxxxx> > > --- > > drivers/gpu/drm/i915/intel_uncore.c | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c > > index 1d7b879cc68c..0529af7cfbb8 100644 > > --- a/drivers/gpu/drm/i915/intel_uncore.c > > +++ b/drivers/gpu/drm/i915/intel_uncore.c > > @@ -1251,7 +1251,7 @@ static const struct register_whitelist { > > } whitelist[] = { > > { .offset_ldw = RING_TIMESTAMP(RENDER_RING_BASE), > > .offset_udw = RING_TIMESTAMP_UDW(RENDER_RING_BASE), > > - .size = 8, .gen_bitmask = GEN_RANGE(4, 9) }, > > + .size = 8, .gen_bitmask = GEN_RANGE(4, 10) }, > > Reviewed-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> > Thanks! > I'd like to kill this GEN_RANGE since it is easy to forget when enabling > a new platform. But this is topic for a different patch. > > Agreed. > > }; > > > > int i915_reg_read_ioctl(struct drm_device *dev, > _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx