With the exposure of i915 PMU event enabling mask we will be able
to implement IGT tests to see whether we properly handle events
enabling/disabling on multiple parallel consumers.
Change-Id: I3561e48cd27bc2a19424cf7b6949fadb2a77ab20
Signed-off-by: Dmitry Rogozhkin <dmitry.v.rogozhkin@xxxxxxxxx>
Cc: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx>
---
drivers/gpu/drm/i915/i915_debugfs.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index a2587c1..684607e 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2315,6 +2315,14 @@ static int i915_rps_boost_info(struct seq_file *m, void *data)
return 0;
}
+static int i915_pmu_enable_info(struct seq_file *m, void *data)
+{
+ struct drm_i915_private *dev_priv = node_to_i915(m->private);
+
+ seq_printf(m, "0x%llx\n", dev_priv->pmu.enable);
+ return 0;
+}
+
static int i915_llc(struct seq_file *m, void *data)
{
struct drm_i915_private *dev_priv = node_to_i915(m->private);
@@ -4898,6 +4906,7 @@ static ssize_t i915_engine_stats_read(struct file *file, char __user *ubuf,
{"i915_sseu_status", i915_sseu_status, 0},
{"i915_drrs_status", i915_drrs_status, 0},
{"i915_rps_boost_info", i915_rps_boost_info, 0},
+ {"i915_pmu_enable_info", i915_pmu_enable_info, 0}
};
#define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
--
1.8.3.1
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