On Thu, Aug 31, 2017 at 07:53:56AM -0700, Rodrigo Vivi wrote: > From: "Vivi, Rodrigo" <rodrigo.vivi@xxxxxxxxx> > > On clock recovery this function is called to find out > the max voltage swing level that we could go. > > However gen 9 functions use the old buffer translation tables > to figure that out. That table is not valid for CNL > causing an invalid number of entries and an invalid selection > on the max voltage swing level. > > v2: Let's use same approach that previous platforms. > v3: Actually use n_entries and avoid duplicated -1. > v4: Avoid cnl_max_level and use current style. > > Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > Cc: Clint Taylor <clinton.a.taylor@xxxxxxxxx> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_ddi.c | 15 +++++++++++---- > 1 file changed, 11 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c > index f1757a8e481a..1da3bb2cc4b4 100644 > --- a/drivers/gpu/drm/i915/intel_ddi.c > +++ b/drivers/gpu/drm/i915/intel_ddi.c > @@ -1879,10 +1879,17 @@ u8 intel_ddi_dp_voltage_max(struct intel_encoder *encoder) > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > int n_entries; > > - if (encoder->type == INTEL_OUTPUT_EDP) > - intel_ddi_get_buf_trans_edp(dev_priv, &n_entries); > - else > - intel_ddi_get_buf_trans_dp(dev_priv, &n_entries); > + if (IS_CANNONLAKE(dev_priv)) { > + if (encoder->type == INTEL_OUTPUT_EDP) > + cnl_get_buf_trans_edp(dev_priv, &n_entries); > + else > + cnl_get_buf_trans_dp(dev_priv, &n_entries); > + } else { > + if (encoder->type == INTEL_OUTPUT_EDP) > + intel_ddi_get_buf_trans_edp(dev_priv, &n_entries); > + else > + intel_ddi_get_buf_trans_dp(dev_priv, &n_entries); > + } > > if (WARN_ON(n_entries < 1)) > n_entries = 1; > -- > 2.13.2 -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx