Quoting Chris Wilson (2017-08-29 20:25:46)
> Since we hold the device wakeref when writing through the GTT (otherwise
> the writes would fail), we presumed that before the device sleeps those
> writes would naturally be flushed and that we wouldn't need our mmio
> read trick. However, that presumption seems false and a sleepy bxt seems
> to require us to always manually flush the GTT writes prior to direct
> access.
>
> Fixes: e2a2aa36a509 ("drm/i915: Check we have an wake device before flushing GTT writes")
> Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
> Cc: Joonas Lahtinen <joonas.lahtinen@xxxxxxxxxxxxxxx>
> Reviewed-by: Joonas Lahtinen <joonas.lahtinen@xxxxxxxxxxxxxxx>
On the basis of two samples, this seems to fix the pwrite flip-flops,
so pushed for a wider sampling.
-Chris
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