Re: [PATCH 3/4] drm/i915/cnl: WaDisableEnhancedSBEVertexCaching

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On 07/05/2017 06:02 PM, Rodrigo Vivi wrote:
WA forTDS handle reallocation getting dropped by SDE,
which may result in PS attribute corruption.

Disable enhanced SBE vertex caching in COMMON_SLICE_CHICKEN2 offset.

v2: Make it until B0 as spec tells. (by Mika).

Signed-off-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
Reviewed-by: Mika Kuoppala <mika.kuoppala@xxxxxxxxx>
---
  drivers/gpu/drm/i915/intel_engine_cs.c | 5 +++++
  1 file changed, 5 insertions(+)

Reviewed-by: Oscar Mateo <oscar.mateo@xxxxxxxxx>

diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
index bc14f0b..f7ebadb 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -1076,6 +1076,11 @@ static int cnl_init_workarounds(struct intel_engine_cs *engine)
  	WA_SET_BIT_MASKED(COMMON_SLICE_CHICKEN2,
  			  GEN8_SBE_DISABLE_REPLAY_BUF_OPTIMIZATION);
+ /* WaDisableEnhancedSBEVertexCaching:cnl (pre-prod) */
+	if (IS_CNL_REVID(dev_priv, 0, CNL_REVID_B0))
+		WA_SET_BIT_MASKED(COMMON_SLICE_CHICKEN2,
+				  GEN8_CSC2_SBE_VUE_CACHE_CONSERVATIVE);
+
  	/* WaInPlaceDecompressionHang:cnl */
  	WA_SET_BIT(GEN9_GAMT_ECO_REG_RW_IA,
  		   GAMT_ECO_ENABLE_IN_PLACE_DECOMPRESS);

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