Cleanup the code. Map the pins in accordance to individual platforms rather than according to ports. Create separate functions for platforms. v2: - Add missing condition for CoffeeLake. Make platform specific functions static. Add function i915_ddc_pin_mapping(). Sugested-by Ville Syrjala <ville.syrjala@xxxxxxxxxxxxxxx> Cc: Ville Syrjala <ville.syrjala@xxxxxxxxxxxxxxx> Cc: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> Cc: Clinton Tayloe <clinton.a.taylor@xxxxxxxxx> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@xxxxxxxxx> --- drivers/gpu/drm/i915/intel_hdmi.c | 115 ++++++++++++++++++++++++++++++-------- 1 file changed, 92 insertions(+), 23 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index 2ef1ee85129d..41e6ba01ec1c 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c @@ -1843,49 +1843,118 @@ void intel_hdmi_handle_sink_scrambling(struct intel_encoder *encoder, DRM_DEBUG_KMS("sink scrambling handled\n"); } -static u8 intel_hdmi_ddc_pin(struct drm_i915_private *dev_priv, - enum port port) +static u8 chv_ddc_pin_mapping(struct drm_i915_private *dev_priv, enum port port) { - const struct ddi_vbt_port_info *info = - &dev_priv->vbt.ddi_port_info[port]; u8 ddc_pin; - if (info->alternate_ddc_pin) { - DRM_DEBUG_KMS("Using DDC pin 0x%x for port %c (VBT)\n", - info->alternate_ddc_pin, port_name(port)); - return info->alternate_ddc_pin; + switch (port) { + + case PORT_B: + ddc_pin = GMBUS_PIN_DPB; + break; + case PORT_C: + ddc_pin = GMBUS_PIN_DPC; + break; + case PORT_D: + ddc_pin = GMBUS_PIN_DPD_CHV; + break; + default: + MISSING_CASE(port); + ddc_pin = GMBUS_PIN_DPB; + break; } + return ddc_pin; +} + +static u8 bxt_ddc_pin_mapping(struct drm_i915_private *dev_priv, enum port port) +{ + u8 ddc_pin; switch (port) { case PORT_B: - if (IS_GEN9_LP(dev_priv) || HAS_PCH_CNP(dev_priv)) - ddc_pin = GMBUS_PIN_1_BXT; - else - ddc_pin = GMBUS_PIN_DPB; + ddc_pin = GMBUS_PIN_1_BXT; break; case PORT_C: - if (IS_GEN9_LP(dev_priv) || HAS_PCH_CNP(dev_priv)) - ddc_pin = GMBUS_PIN_2_BXT; - else - ddc_pin = GMBUS_PIN_DPC; + ddc_pin = GMBUS_PIN_2_BXT; + break; + default: + MISSING_CASE(port); + ddc_pin = GMBUS_PIN_DPB; + break; + } + return ddc_pin; +} + +static u8 cnp_ddc_pin_mapping(struct drm_i915_private *dev_priv, + enum port port) +{ + u8 ddc_pin; + + switch (port) { + case PORT_B: + ddc_pin = GMBUS_PIN_1_BXT; + break; + case PORT_C: + ddc_pin = GMBUS_PIN_2_BXT; break; case PORT_D: - if (HAS_PCH_CNP(dev_priv)) - ddc_pin = GMBUS_PIN_4_CNP; - else if (IS_CHERRYVIEW(dev_priv)) - ddc_pin = GMBUS_PIN_DPD_CHV; - else - ddc_pin = GMBUS_PIN_DPD; + ddc_pin = GMBUS_PIN_4_CNP; + break; + default: + MISSING_CASE(port); + ddc_pin = GMBUS_PIN_DPB; + break; + } + return ddc_pin; +} + +static u8 i915_ddc_pin_mapping(struct drm_i915_private *dev_priv, + enum port port) +{ + u8 ddc_pin; + + switch (port) { + case PORT_B: + ddc_pin = GMBUS_PIN_DPB; + break; + case PORT_C: + ddc_pin = GMBUS_PIN_DPC; + break; + case PORT_D: + ddc_pin = GMBUS_PIN_DPD; break; default: MISSING_CASE(port); ddc_pin = GMBUS_PIN_DPB; break; } + return ddc_pin; + +} +static u8 intel_hdmi_ddc_pin(struct drm_i915_private *dev_priv, + enum port port) +{ + const struct ddi_vbt_port_info *info = + &dev_priv->vbt.ddi_port_info[port]; + u8 ddc_pin = 0; + + if (info->alternate_ddc_pin) { + DRM_DEBUG_KMS("Using DDC pin 0x%x for port %c (VBT)\n", + info->alternate_ddc_pin, port_name(port)); + return info->alternate_ddc_pin; + } + + if (IS_CHERRYVIEW(dev_priv)) + ddc_pin = chv_ddc_pin_mapping(dev_priv, port); + else if (IS_GEN9_LP(dev_priv)) + ddc_pin = bxt_ddc_pin_mapping(dev_priv, port); + else if (HAS_PCH_CNP(dev_priv)) + ddc_pin = cnp_ddc_pin_mapping(dev_priv, port); + else + ddc_pin = i915_ddc_pin_mapping(dev_priv, port); DRM_DEBUG_KMS("Using DDC pin 0x%x for port %c (platform default)\n", ddc_pin, port_name(port)); - return ddc_pin; } -- 2.11.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx