From: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx> Track total time requests have been executing on the hardware. We add new kernel API to allow software tracking of time GPU engines are spending executing requests. Both per-engine and global API is added with the latter also being exported for use by external users. v2: * Squashed with the internal API. * Dropped static key. * Made per-engine. * Store time in monotonic ktime. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx> --- drivers/gpu/drm/i915/intel_engine_cs.c | 103 ++++++++++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_lrc.c | 2 + drivers/gpu/drm/i915/intel_ringbuffer.h | 61 +++++++++++++++++++ 3 files changed, 166 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c index 14630612325b..e709f4edef90 100644 --- a/drivers/gpu/drm/i915/intel_engine_cs.c +++ b/drivers/gpu/drm/i915/intel_engine_cs.c @@ -232,6 +232,8 @@ intel_engine_setup(struct drm_i915_private *dev_priv, /* Nothing to do here, execute in order of dependencies */ engine->schedule = NULL; + spin_lock_init(&engine->stats.lock); + ATOMIC_INIT_NOTIFIER_HEAD(&engine->context_status_notifier); dev_priv->engine_class[info->class][info->instance] = engine; @@ -1345,6 +1347,107 @@ void intel_engines_mark_idle(struct drm_i915_private *i915) } } +int intel_enable_engine_stats(struct intel_engine_cs *engine) +{ + unsigned long flags; + + if (!i915.enable_execlists) + return -ENODEV; + + spin_lock_irqsave(&engine->stats.lock, flags); + if (engine->stats.enabled++ == 0) { + engine->stats.ref = 0; + engine->stats.start = engine->stats.total = 0; + } else if (engine->stats.enabled == ~0) { + goto busy; + } + spin_unlock_irqrestore(&engine->stats.lock, flags); + + return 0; + +busy: + spin_unlock_irqrestore(&engine->stats.lock, flags); + + return -EBUSY; +} + +void intel_disable_engine_stats(struct intel_engine_cs *engine) +{ + unsigned long flags; + + if (!i915.enable_execlists) + return; + + spin_lock_irqsave(&engine->stats.lock, flags); + WARN_ON_ONCE(engine->stats.enabled == 0); + engine->stats.enabled--; + spin_unlock_irqrestore(&engine->stats.lock, flags); +} + +int intel_enable_engines_stats(struct drm_i915_private *dev_priv) +{ + struct intel_engine_cs *engine; + enum intel_engine_id id; + int ret = 0; + + if (!i915.enable_execlists) + return -ENODEV; + + for_each_engine(engine, dev_priv, id) { + ret = intel_enable_engine_stats(engine); + if (WARN_ON_ONCE(ret)) + break; + } + + return ret; +} +EXPORT_SYMBOL(intel_enable_engines_stats); + +void intel_disable_engines_stats(struct drm_i915_private *dev_priv) +{ + struct intel_engine_cs *engine; + enum intel_engine_id id; + + for_each_engine(engine, dev_priv, id) + intel_disable_engine_stats(engine); +} +EXPORT_SYMBOL(intel_disable_engines_stats); + +ktime_t intel_engine_get_busy_time(struct intel_engine_cs *engine) +{ + ktime_t total; + unsigned long flags; + + spin_lock_irqsave(&engine->stats.lock, flags); + + total = engine->stats.total; + + /* + * If the engine is executing something at the moment + * add it to the total. + */ + if (engine->stats.ref) + total = ktime_add(total, + ktime_sub(ktime_get(), engine->stats.start)); + + spin_unlock_irqrestore(&engine->stats.lock, flags); + + return total; +} + +ktime_t intel_engines_get_busy_time(struct drm_i915_private *dev_priv) +{ + struct intel_engine_cs *engine; + enum intel_engine_id id; + ktime_t total = 0; + + for_each_engine(engine, dev_priv, id) + total = ktime_add(total, intel_engine_get_busy_time(engine)); + + return total; +} +EXPORT_SYMBOL(intel_engines_get_busy_time); + #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST) #include "selftests/mock_engine.c" #endif diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 4c2cb07c39e2..5de2fdb86e61 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -310,12 +310,14 @@ execlists_context_status_change(struct drm_i915_gem_request *rq, static inline void execlists_context_schedule_in(struct drm_i915_gem_request *rq) { + intel_engine_context_in(rq->engine); execlists_context_status_change(rq, INTEL_CONTEXT_SCHEDULE_IN); } static inline void execlists_context_schedule_out(struct drm_i915_gem_request *rq) { + intel_engine_context_out(rq->engine); execlists_context_status_change(rq, INTEL_CONTEXT_SCHEDULE_OUT); } diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h index 9fdf0cdf6220..68f50ec72be6 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.h +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h @@ -446,6 +446,14 @@ struct intel_engine_cs { * certain bits to encode the command length in the header). */ u32 (*get_cmd_length_mask)(u32 cmd_header); + + struct { + spinlock_t lock; + unsigned int enabled; + unsigned int ref; + ktime_t start; /* Timestamp of the last idle to active transition. */ + ktime_t total; /* Total time engined was busy. */ + } stats; }; static inline unsigned int @@ -743,4 +751,57 @@ void intel_engines_reset_default_submission(struct drm_i915_private *i915); struct intel_engine_cs * intel_engine_lookup_user(struct drm_i915_private *i915, u8 class, u8 instance); +static inline void intel_engine_context_in(struct intel_engine_cs *engine) +{ + unsigned long flags; + + if (READ_ONCE(engine->stats.enabled) == 0) + return; + + spin_lock_irqsave(&engine->stats.lock, flags); + + if (engine->stats.enabled > 0) { + if (engine->stats.ref++ == 0) + engine->stats.start = ktime_get(); + GEM_BUG_ON(engine->stats.ref == 0); + } + + spin_unlock_irqrestore(&engine->stats.lock, flags); +} + +static inline void intel_engine_context_out(struct intel_engine_cs *engine) +{ + unsigned long flags; + + if (READ_ONCE(engine->stats.enabled) == 0) + return; + + spin_lock_irqsave(&engine->stats.lock, flags); + + if (engine->stats.enabled > 0) { + /* + * After turning on engine stats, context out might be the + * first event which then needs to be ignored (ref == 0). + */ + if (engine->stats.ref && --engine->stats.ref == 0) { + ktime_t last = ktime_sub(ktime_get(), + engine->stats.start); + + engine->stats.total = ktime_add(engine->stats.total, + last); + } + } + + spin_unlock_irqrestore(&engine->stats.lock, flags); +} + +int intel_enable_engine_stats(struct intel_engine_cs *engine); +void intel_disable_engine_stats(struct intel_engine_cs *engine); + +int intel_enable_engines_stats(struct drm_i915_private *dev_priv); +void intel_disable_engines_stats(struct drm_i915_private *dev_priv); + +ktime_t intel_engine_get_busy_time(struct intel_engine_cs *engine); +ktime_t intel_engines_get_busy_time(struct drm_i915_private *dev_priv); + #endif /* _INTEL_RINGBUFFER_H_ */ -- 2.9.4 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx