On Wed, Jul 12, 2017 at 05:08:52PM +0300, Jani Nikula wrote: > Signed-off-by: Jani Nikula <jani.nikula@xxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_ddi.c | 8 ++++++++ > drivers/gpu/drm/i915/intel_display.c | 5 +---- > 2 files changed, 9 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c > index efb13582dc73..7c083fe0b622 100644 > --- a/drivers/gpu/drm/i915/intel_ddi.c > +++ b/drivers/gpu/drm/i915/intel_ddi.c > @@ -2182,8 +2182,16 @@ static void intel_ddi_pre_enable(struct intel_encoder *encoder, > struct intel_crtc_state *pipe_config, > struct drm_connector_state *conn_state) > { > + struct drm_crtc *crtc = pipe_config->base.crtc; > + struct drm_i915_private *dev_priv = to_i915(crtc->dev); > + struct intel_crtc *intel_crtc = to_intel_crtc(crtc); > + int pipe = intel_crtc->pipe; > int type = encoder->type; > > + WARN_ON(intel_crtc->config->has_pch_encoder); > + > + intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true); Doesn't this miss dsi ports? Also I'd half expect that once you've pushed all the fdi stuff into the encoder you can again have a unified place where we enable cpu underrun reporting. At least that's my intuition since the fdi stuff is all behind the port, and as soon as the port is up we should be able to enable fifo underruns. -Daniel > + > if (type == INTEL_OUTPUT_DP || type == INTEL_OUTPUT_EDP) { > intel_ddi_pre_enable_dp(encoder, > pipe_config->port_clock, > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index ec6391bdd308..9e074310f161 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -5338,7 +5338,7 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config, > struct drm_crtc *crtc = pipe_config->base.crtc; > struct drm_i915_private *dev_priv = to_i915(crtc->dev); > struct intel_crtc *intel_crtc = to_intel_crtc(crtc); > - int pipe = intel_crtc->pipe, hsw_workaround_pipe; > + int hsw_workaround_pipe; > enum transcoder cpu_transcoder = intel_crtc->config->cpu_transcoder; > struct intel_atomic_state *old_intel_state = > to_intel_atomic_state(old_state); > @@ -5379,9 +5379,6 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config, > > intel_crtc->active = true; > > - if (!intel_crtc->config->has_pch_encoder) > - intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true); > - > intel_encoders_pre_enable(crtc, pipe_config, old_state); > > if (intel_crtc->config->has_pch_encoder) > -- > 2.11.0 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx