Quoting Daniele Ceraolo Spurio (2017-07-06 17:10:40)
> On gen8+ we're currently using the PPHWSP of the kernel ctx as the
> global HWSP. However, when the kernel ctx gets submitted (e.g. from
> __intel_autoenable_gt_powersave) the HW will use that page as both
> HWSP and PPHWSP. Currently we're not seeing any problem because the
> conflict happens at offsets below 0x30 in an area we don't access,
> but that is not guaranteed to be true for future platform.
>
> To avoid the conflict, instead of re-using the PPHWSP of the kernel
> ctx we can allocate a separate page for the HWSP like what happens for
> pre-execlists platform.
We should add some concrete reason why we want it today...
> +static void cleanup_status_page(struct intel_engine_cs *engine)
> +{
> + struct i915_vma *vma;
> + struct drm_i915_gem_object *obj;
This is virtually i915_vma_unpin_and_release(), I think there are enough
users that adding some flags to unpin the map may be a good refactor.
> -static int
> -logical_ring_init(struct intel_engine_cs *engine)
> +static int logical_ring_init(struct intel_engine_cs *engine)
> {
> - struct i915_gem_context *dctx = engine->i915->kernel_context;
> - int ret;
> + int ret = 0;
>
> ret = intel_engine_init_common(engine);
> if (ret)
> - goto error;
I prefer if we keep the error:, it makes adding new steps easier.
-Chris
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