patch merged to dinq. thanks for reviewing. On Thu, Jul 6, 2017 at 2:52 PM, Clint Taylor <clinton.a.taylor@xxxxxxxxx> wrote: > > > On 07/06/2017 02:08 PM, Rodrigo Vivi wrote: >> >> Cannon Lake's VBT that is currently available for B0 stepping >> states that port D uses alternate pin 3 messing up with the >> default pin-port mapping table. Using that information we cannot >> get HDMI working properly. So for now we don't relly on VBT for >> this information. >> >> Cc: Clint Taylor <clinton.a.taylor@xxxxxxxxx> >> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> >> --- >> drivers/gpu/drm/i915/intel_bios.c | 9 +++++++++ >> 1 file changed, 9 insertions(+) >> >> diff --git a/drivers/gpu/drm/i915/intel_bios.c >> b/drivers/gpu/drm/i915/intel_bios.c >> index 639d45c..82b144c 100644 >> --- a/drivers/gpu/drm/i915/intel_bios.c >> +++ b/drivers/gpu/drm/i915/intel_bios.c >> @@ -1187,6 +1187,15 @@ static void parse_ddi_port(struct drm_i915_private >> *dev_priv, enum port port, >> if (is_dvi) { >> info->alternate_ddc_pin = ddc_pin; >> + /* >> + * All VBTs that we got so far for B Stepping has this >> + * information wrong for Port D. So, let's just ignore for >> now. >> + */ >> + if (IS_CNL_REVID(dev_priv, CNL_REVID_B0, CNL_REVID_B0) && >> + port == PORT_D) { >> + info->alternate_ddc_pin = 0; >> + } >> + > > > Reviewed-by: Clinton Taylor <clinton.a.taylor@xxxxxxxxx> > > -Clint > >> sanitize_ddc_pin(dev_priv, port); >> } >> > > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Rodrigo Vivi Blog: http://blog.vivi.eng.br _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx