Signed-off-by: Ben Widawsky <ben@xxxxxxxxxxxx> --- src/intel/drm/i915_drm.h | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/src/intel/drm/i915_drm.h b/src/intel/drm/i915_drm.h index c26bf7c125..69e38ce89f 100644 --- a/src/intel/drm/i915_drm.h +++ b/src/intel/drm/i915_drm.h @@ -431,6 +431,14 @@ typedef struct drm_i915_irq_wait { */ #define I915_PARAM_HAS_EXEC_BATCH_FIRST 48 +/* What version of the MOCS table we have. For GEN9 GPUs, the PRM defined + * non-optimal settings for the MOCS table. As a result, we were required to use a + * small subset, and later add new settings. This param allows userspace to + * determine which settings are there. + */ +#define MOCS_TABLE_VERSION 1 /* Build time MOCS table version */ +#define I915_PARAM_MOCS_TABLE_VERSION 49 + typedef struct drm_i915_getparam { __s32 param; /* -- 2.13.2 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx