merged to dinq. thanks for the review.
On Thu, Jul 6, 2017 at 2:46 PM, Clint Taylor <clinton.a.taylor@xxxxxxxxx> wrote:
>
> Reviewed-by: Clinton Taylor <clinton.a.taylor@xxxxxxxxx>
>
> -Clint
>
>
> On 07/06/2017 02:01 PM, Rodrigo Vivi wrote:
>>
>> Cannonlake has same color setup as Geminilake.
>> Legacy color load luts doesn't work anymore on Cannonlake+.
>>
>> Cc: Clint Taylor <clinton.a.taylor@xxxxxxxxx>
>> Cc: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@xxxxxxxxx>
>> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
>> ---
>> drivers/gpu/drm/i915/i915_pci.c | 1 +
>> drivers/gpu/drm/i915/intel_color.c | 2 +-
>> drivers/gpu/drm/i915/intel_display.c | 4 ++--
>> drivers/gpu/drm/i915/intel_sprite.c | 2 +-
>> 4 files changed, 5 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_pci.c
>> b/drivers/gpu/drm/i915/i915_pci.c
>> index 04aaf55..a1e6b69 100644
>> --- a/drivers/gpu/drm/i915/i915_pci.c
>> +++ b/drivers/gpu/drm/i915/i915_pci.c
>> @@ -449,6 +449,7 @@
>> .gen = 10,
>> .ddb_size = 1024,
>> .has_csr = 1,
>> + .color = { .degamma_lut_size = 0, .gamma_lut_size = 1024 }
>> };
>> /*
>> diff --git a/drivers/gpu/drm/i915/intel_color.c
>> b/drivers/gpu/drm/i915/intel_color.c
>> index 306c6b0..f85d575 100644
>> --- a/drivers/gpu/drm/i915/intel_color.c
>> +++ b/drivers/gpu/drm/i915/intel_color.c
>> @@ -615,7 +615,7 @@ void intel_color_init(struct drm_crtc *crtc)
>> IS_BROXTON(dev_priv)) {
>> dev_priv->display.load_csc_matrix = i9xx_load_csc_matrix;
>> dev_priv->display.load_luts = broadwell_load_luts;
>> - } else if (IS_GEMINILAKE(dev_priv)) {
>> + } else if (IS_GEMINILAKE(dev_priv) || IS_CANNONLAKE(dev_priv)) {
>> dev_priv->display.load_csc_matrix = i9xx_load_csc_matrix;
>> dev_priv->display.load_luts = glk_load_luts;
>> } else {
>> diff --git a/drivers/gpu/drm/i915/intel_display.c
>> b/drivers/gpu/drm/i915/intel_display.c
>> index 0648fd7..2144adc 100644
>> --- a/drivers/gpu/drm/i915/intel_display.c
>> +++ b/drivers/gpu/drm/i915/intel_display.c
>> @@ -3311,7 +3311,7 @@ u32 skl_plane_ctl(const struct intel_crtc_state
>> *crtc_state,
>> plane_ctl = PLANE_CTL_ENABLE;
>> - if (!IS_GEMINILAKE(dev_priv)) {
>> + if (!IS_GEMINILAKE(dev_priv) && !IS_CANNONLAKE(dev_priv)) {
>> plane_ctl |=
>> PLANE_CTL_PIPE_GAMMA_ENABLE |
>> PLANE_CTL_PIPE_CSC_ENABLE |
>> @@ -3367,7 +3367,7 @@ static void skylake_update_primary_plane(struct
>> intel_plane *plane,
>> spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
>> - if (IS_GEMINILAKE(dev_priv)) {
>> + if (IS_GEMINILAKE(dev_priv) || IS_CANNONLAKE(dev_priv)) {
>> I915_WRITE_FW(PLANE_COLOR_CTL(pipe, plane_id),
>> PLANE_COLOR_PIPE_GAMMA_ENABLE |
>> PLANE_COLOR_PIPE_CSC_ENABLE |
>> diff --git a/drivers/gpu/drm/i915/intel_sprite.c
>> b/drivers/gpu/drm/i915/intel_sprite.c
>> index 0c650c2..94f9a13 100644
>> --- a/drivers/gpu/drm/i915/intel_sprite.c
>> +++ b/drivers/gpu/drm/i915/intel_sprite.c
>> @@ -262,7 +262,7 @@ void intel_pipe_update_end(struct intel_crtc *crtc,
>> struct intel_flip_work *work
>> spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
>> - if (IS_GEMINILAKE(dev_priv)) {
>> + if (IS_GEMINILAKE(dev_priv) || IS_CANNONLAKE(dev_priv)) {
>> I915_WRITE_FW(PLANE_COLOR_CTL(pipe, plane_id),
>> PLANE_COLOR_PIPE_GAMMA_ENABLE |
>> PLANE_COLOR_PIPE_CSC_ENABLE |
>
>
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--
Rodrigo Vivi
Blog: http://blog.vivi.eng.br
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