Platform enabling and its power-on are organized in different
skus (U x Y x S x H, etc). So instead of organizing it in
GT1 x GT2 x GT3 let's also use the platform sku.
This is also the new Spec style what makes the review much
more easy and straightforward.
This is a copy of merged i915's
commit e918d79a5d0a ("drm/i915/cnl: Add Cannonlake PCI IDs for U-skus.")
v2: Based on Anusha's kernel clean-up.
v3: Add kernel commit id for reference.
Cc: Anusha Srivatsa <anusha.srivatsa@xxxxxxxxx>
Cc: Clinton Taylor <clinton.a.taylor@xxxxxxxxx>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
---
lib/i915_pciids.h | 9 +++++++++
lib/intel_device_info.c | 2 ++
2 files changed, 11 insertions(+)
diff --git a/lib/i915_pciids.h b/lib/i915_pciids.h
index 71cce60..8109e73 100644
--- a/lib/i915_pciids.h
+++ b/lib/i915_pciids.h
@@ -346,6 +346,15 @@
INTEL_VGA_DEVICE(0x3E9B, info), /* Halo GT2 */ \
INTEL_VGA_DEVICE(0x3E94, info) /* Halo GT2 */
+#define INTEL_CNL_U_GT2_IDS(info) \
+ INTEL_VGA_DEVICE(0x5A52, info), \
+ INTEL_VGA_DEVICE(0x5A5A, info), \
+ INTEL_VGA_DEVICE(0x5A42, info), \
+ INTEL_VGA_DEVICE(0x5A4A, info)
+
+#define INTEL_CNL_IDS(info) \
+ INTEL_CNL_U_GT2_IDS(info)
+
#define INTEL_CFL_U_IDS(info) \
INTEL_VGA_DEVICE(0x3EA5, info), /* ULT GT3 */ \
INTEL_VGA_DEVICE(0x3EA6, info), /* ULT GT3 */ \
diff --git a/lib/intel_device_info.c b/lib/intel_device_info.c
index dda5d11..8ea19f2 100644
--- a/lib/intel_device_info.c
+++ b/lib/intel_device_info.c
@@ -249,6 +249,8 @@ static const struct pci_id_match intel_device_match[] = {
INTEL_CFL_IDS(&intel_coffeelake_info),
+ INTEL_CNL_IDS(&intel_cannonlake_info),
+
INTEL_VGA_DEVICE(PCI_MATCH_ANY, &intel_generic_info),
};
--
1.9.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
