On 6/29/2017 6:07 AM, Chris Wilson wrote:
Quoting Ville Syrjälä (2017-06-29 14:05:25)
On Wed, Jun 28, 2017 at 04:24:27PM -0700, Michel Thierry wrote:
There's no need to keep reading random registers in i915_swizzle_info if
the platform is not doing GPU side swizzling.
After HSW, swizzling is not used, and the CPU's memory controller
performs all the address swizzling modifications, commit be292e1563ac5b
("drm/i915/bdw: Let the memory controller do all the swizzling").
But BDW still contains the registers and hardware capability no? So
might be a good idea to be able to check that it's not misconfigured.
Especially in debugfs where it is useful to show both the hw state and
what we thought it should be.
Hi,
Yes, the registers are still there (but this may change). Are you ok if
I change this to apply only to GEN9+?
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