On Thu, Jun 15, 2017 at 11:11:45AM +0800, Xiong Zhang wrote: > In a IGD passthrough environment, the real ISA bridge may doesn't exist. > then pch_id couldn't be correctly gotten from ISA bridge, but pch_id is > used to identify LPT_H and LPT_LP. Currently i915 treat all LPT pch as > LPT_H,then errors occur when i915 runs on LPT_LP machines with igd > passthrough. > > This patch set pch_id for HSW/BDW according to IGD type and isn't fully > correct. But it solves such issue on HSW/BDW ult/ulx machines. > QA CI system is blocked by this issue for a long time, it's better that > we could merge it to unblock QA CI system. > > We know the root cause is in device model of virtual passthrough, and > will resolve it in the future with several parts cooperation in kernel, > qemu and xen. > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99938 > > Signed-off-by: Xiong Zhang <xiong.y.zhang@xxxxxxxxx> Looks ok to me, this is the assumption of the non-passthrough case anyway: Reviewed-by: Imre Deak <imre.deak@xxxxxxxxx> I noticed a few issues in the surrounding code: SPT/SPT_LP and CNP/CNP_LP have the same problem, although we don't need to distinguish between them atm. I think a cleaner way would be to adjust id and ext_id in the pass-through case in intel_detect_pch() upfront and set dev_priv->pch_type accordingly the same way as it's done in the non-passthrough case. Also, unrelated to the pass-through case, the HAS_PCH_CNP_LP() macro looks bogus, it checks only 8 bits of the PCI device ID instead of 9, so it'll be false on CNP_LP platforms (and true on SPT_LP). --Imre > --- > drivers/gpu/drm/i915/i915_drv.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c > index 1f802de..2e664c5 100644 > --- a/drivers/gpu/drm/i915/i915_drv.c > +++ b/drivers/gpu/drm/i915/i915_drv.c > @@ -135,6 +135,10 @@ static enum intel_pch intel_virt_detect_pch(struct drm_i915_private *dev_priv) > DRM_DEBUG_KMS("Assuming CouarPoint PCH\n"); > } else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { > ret = PCH_LPT; > + if (IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv)) > + dev_priv->pch_id = INTEL_PCH_LPT_LP_DEVICE_ID_TYPE; > + else > + dev_priv->pch_id = INTEL_PCH_LPT_DEVICE_ID_TYPE; > DRM_DEBUG_KMS("Assuming LynxPoint PCH\n"); > } else if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) { > ret = PCH_SPT; > -- > 2.7.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
