On Wed, May 31, 2017 at 08:05:35PM +0300, Imre Deak wrote:
> Atm disabling either DP or eDP outputs can generate a spurious short
> pulse interrupt. The reason is that after disabling the port the source
> will stop sending a valid stream data, while the sink expects either a
> valid stream or the idle pattern. Since neither of this is sent the sink
> assumes (after an arbitrary delay) that the link is lost and requests
> for link retraining with a short pulse.
>
> The spurious pulse is a real problem at least for eDP panels with long
> power-off / power-cycle delays: as part of disabling the output we
> disable the panel power. The subsequent spurious short pulse handling
> will have to turn the power back on, which means the driver has to do a
> redundant wait for the power-off and power-cycle delays. During system
> suspend this leads to an unnecessary delay up to ~1s on systems with
> such panels as reported by Rui.
>
> To fix this put the sink to DPMS D3 state before turning off the port.
> According to the DP spec in this state the sink should not request
> retraining. This is also what we do already on pre-ddi platforms.
>
> As an alternative I also tried configuring the port to send idle pattern
> - which is against BSPec - and leave the port in normal mode before
> turning off the port. Neither of these resolved the problem.
>
> Cc: Zhang Rui <rui.zhang@xxxxxxxxx>
> Cc: David Weinehall <david.weinehall@xxxxxxxxxxxxxxx>
> Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> Reported-and-tested-by: Zhang Rui <rui.zhang@xxxxxxxxx>
> Signed-off-by: Imre Deak <imre.deak@xxxxxxxxx>
Makes sense to me.
Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> ---
> drivers/gpu/drm/i915/intel_ddi.c | 10 +++++++---
> 1 file changed, 7 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> index 0914ad9..8bac628 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -1732,12 +1732,18 @@ static void intel_ddi_post_disable(struct intel_encoder *intel_encoder,
> struct drm_i915_private *dev_priv = to_i915(encoder->dev);
> enum port port = intel_ddi_get_encoder_port(intel_encoder);
> struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
> + struct intel_dp *intel_dp = NULL;
> int type = intel_encoder->type;
> uint32_t val;
> bool wait = false;
>
> /* old_crtc_state and old_conn_state are NULL when called from DP_MST */
>
> + if (type == INTEL_OUTPUT_DP || type == INTEL_OUTPUT_EDP) {
> + intel_dp = enc_to_intel_dp(encoder);
> + intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF);
> + }
> +
> val = I915_READ(DDI_BUF_CTL(port));
> if (val & DDI_BUF_CTL_ENABLE) {
> val &= ~DDI_BUF_CTL_ENABLE;
> @@ -1753,9 +1759,7 @@ static void intel_ddi_post_disable(struct intel_encoder *intel_encoder,
> if (wait)
> intel_wait_ddi_buf_idle(dev_priv, port);
>
> - if (type == INTEL_OUTPUT_DP || type == INTEL_OUTPUT_EDP) {
> - struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> - intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF);
> + if (intel_dp) {
> intel_edp_panel_vdd_on(intel_dp);
> intel_edp_panel_off(intel_dp);
> }
> --
> 2.7.4
--
Ville Syrjälä
Intel OTC
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