We need this because ppgtt page directory entries need to be in the global gtt pagetable. Signed-Off-by: Daniel Vetter <daniel.vetter at ffwll.ch> --- drivers/char/agp/intel-gtt.c | 2 ++ include/drm/intel-gtt.h | 2 ++ 2 files changed, 4 insertions(+), 0 deletions(-) diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c index 0a305ac..71a55bd 100644 --- a/drivers/char/agp/intel-gtt.c +++ b/drivers/char/agp/intel-gtt.c @@ -680,6 +680,7 @@ static int intel_gtt_init(void) iounmap(intel_private.registers); return -ENOMEM; } + intel_private.base.gtt = intel_private.gtt; global_cache_flush(); /* FIXME: ? */ @@ -1175,6 +1176,7 @@ static void gen6_write_entry(dma_addr_t addr, unsigned int entry, /* gen6 has bit11-4 for physical addr bit39-32 */ addr |= (addr >> 28) & 0xff0; + writel(addr | pte_flags, intel_private.gtt + entry); } diff --git a/include/drm/intel-gtt.h b/include/drm/intel-gtt.h index 6d4c77a..0a0001b 100644 --- a/include/drm/intel-gtt.h +++ b/include/drm/intel-gtt.h @@ -17,6 +17,8 @@ const struct intel_gtt { unsigned int do_idle_maps : 1; /* Share the scratch page dma with ppgtts. */ dma_addr_t scratch_page_dma; + /* for ppgtt PDE access */ + u32 __iomem *gtt; } *intel_gtt_get(void); void intel_gtt_chipset_flush(void); -- 1.7.6.3