Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> writes: > Repeat the reset a couple of times if at first we do not succeed. > > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > Link: > http://patchwork.freedesktop.org/patch/msgid/20170513083726.502-1-chris@xxxxxxxxxxxxxxxxxx Seems that this is already merged but FWIW. Reviewed-by: Mika Kuoppala <mika.kuoppala@xxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_uncore.c | 44 +++++++++++++++++++++---------------- > 1 file changed, 25 insertions(+), 19 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c > index 71b9b387ad04..fc3da0a6fdbb 100644 > --- a/drivers/gpu/drm/i915/intel_uncore.c > +++ b/drivers/gpu/drm/i915/intel_uncore.c > @@ -1463,9 +1463,10 @@ int i915_reg_read_ioctl(struct drm_device *dev, > return ret; > } > > -static int i915_reset_complete(struct pci_dev *pdev) > +static bool i915_reset_complete(struct pci_dev *pdev) > { > u8 gdrst; > + > pci_read_config_byte(pdev, I915_GDRST, &gdrst); > return (gdrst & GRDOM_RESET_STATUS) == 0; > } > @@ -1476,15 +1477,16 @@ static int i915_do_reset(struct drm_i915_private *dev_priv, unsigned engine_mask > > /* assert reset for at least 20 usec */ > pci_write_config_byte(pdev, I915_GDRST, GRDOM_RESET_ENABLE); > - udelay(20); > + usleep_range(50, 200); > pci_write_config_byte(pdev, I915_GDRST, 0); > > return wait_for(i915_reset_complete(pdev), 500); > } > > -static int g4x_reset_complete(struct pci_dev *pdev) > +static bool g4x_reset_complete(struct pci_dev *pdev) > { > u8 gdrst; > + > pci_read_config_byte(pdev, I915_GDRST, &gdrst); > return (gdrst & GRDOM_RESET_ENABLE) == 0; > } > @@ -1492,6 +1494,7 @@ static int g4x_reset_complete(struct pci_dev *pdev) > static int g33_do_reset(struct drm_i915_private *dev_priv, unsigned engine_mask) > { > struct pci_dev *pdev = dev_priv->drm.pdev; > + > pci_write_config_byte(pdev, I915_GDRST, GRDOM_RESET_ENABLE); > return wait_for(g4x_reset_complete(pdev), 500); > } > @@ -1505,7 +1508,7 @@ static int g4x_do_reset(struct drm_i915_private *dev_priv, unsigned engine_mask) > GRDOM_RENDER | GRDOM_RESET_ENABLE); > ret = wait_for(g4x_reset_complete(pdev), 500); > if (ret) > - return ret; > + goto out; > > /* WaVcpClkGateDisableForMediaReset:ctg,elk */ > I915_WRITE(VDECCLK_GATE_D, I915_READ(VDECCLK_GATE_D) | VCP_UNIT_CLOCK_GATE_DISABLE); > @@ -1514,16 +1517,14 @@ static int g4x_do_reset(struct drm_i915_private *dev_priv, unsigned engine_mask) > pci_write_config_byte(pdev, I915_GDRST, > GRDOM_MEDIA | GRDOM_RESET_ENABLE); > ret = wait_for(g4x_reset_complete(pdev), 500); > - if (ret) > - return ret; > > /* WaVcpClkGateDisableForMediaReset:ctg,elk */ > I915_WRITE(VDECCLK_GATE_D, I915_READ(VDECCLK_GATE_D) & ~VCP_UNIT_CLOCK_GATE_DISABLE); > POSTING_READ(VDECCLK_GATE_D); > > +out: > pci_write_config_byte(pdev, I915_GDRST, 0); > - > - return 0; > + return ret; > } > > static int ironlake_do_reset(struct drm_i915_private *dev_priv, > @@ -1531,25 +1532,21 @@ static int ironlake_do_reset(struct drm_i915_private *dev_priv, > { > int ret; > > - I915_WRITE(ILK_GDSR, > - ILK_GRDOM_RENDER | ILK_GRDOM_RESET_ENABLE); > + I915_WRITE(ILK_GDSR, ILK_GRDOM_RENDER | ILK_GRDOM_RESET_ENABLE); > ret = intel_wait_for_register(dev_priv, > ILK_GDSR, ILK_GRDOM_RESET_ENABLE, 0, > 500); > if (ret) > - return ret; > + goto out; > > - I915_WRITE(ILK_GDSR, > - ILK_GRDOM_MEDIA | ILK_GRDOM_RESET_ENABLE); > + I915_WRITE(ILK_GDSR, ILK_GRDOM_MEDIA | ILK_GRDOM_RESET_ENABLE); > ret = intel_wait_for_register(dev_priv, > ILK_GDSR, ILK_GRDOM_RESET_ENABLE, 0, > 500); > - if (ret) > - return ret; > - > +out: > I915_WRITE(ILK_GDSR, 0); > - > - return 0; > + POSTING_READ(ILK_GDSR); > + return ret; > } > > /* Reset the hardware domains (GENX_GRDOM_*) specified by mask */ > @@ -1758,8 +1755,11 @@ static reset_func intel_get_gpu_reset(struct drm_i915_private *dev_priv) > int intel_gpu_reset(struct drm_i915_private *dev_priv, unsigned engine_mask) > { > reset_func reset; > + int retry; > int ret; > > + might_sleep(); > + > reset = intel_get_gpu_reset(dev_priv); > if (reset == NULL) > return -ENODEV; > @@ -1768,7 +1768,13 @@ int intel_gpu_reset(struct drm_i915_private *dev_priv, unsigned engine_mask) > * request may be dropped and never completes (causing -EIO). > */ > intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL); > - ret = reset(dev_priv, engine_mask); > + for (retry = 0; retry < 3; retry++) { > + ret = reset(dev_priv, engine_mask); > + if (ret != -ETIMEDOUT) > + break; > + > + cond_resched(); > + } > intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL); > > return ret; > -- > 2.11.0 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
