Adds support for 64K, 2M and 1G pages for the 48b PPGTT. We select the largest gtt page size which fits the layout of the sg table. To complement this we also request THP for our shmem backed objects, which should be able to give us 2M or 1G pages depending on configuration. Hopefully this addresses the concerns from the last version. Matthew Auld (17): drm/i915: introduce page_size_mask to dev_info drm/i915: introduce gtt page size drm/i915: align the vma start to the gtt page size drm/i915: align 64K objects to 2M drm/i915: fallback to normal pages on vma insert failure mm/shmem: expose driver overridable huge option drm/i915: request THP for shmem backed objects drm/i915: pass gtt page size to insert_entries drm/i915: enable IPS bit for 64K pages drm/i915: support inserting 64K pages into the 48b PPGTT drm/i915: disable GTT cache for 2M/1G pages drm/i915: support inserting 2M pages into the 48b PPGTT drm/i915: support inserting 1G pages into the 48b PPGTT drm/i915/debugfs: include some gtt_page_size metrics drm/i915: enable platform support for 64K pages drm/i915: enable platform support for 2M pages drm/i915: enable platform support for 1G pages drivers/gpu/drm/i915/i915_debugfs.c | 37 +++- drivers/gpu/drm/i915/i915_drv.h | 3 + drivers/gpu/drm/i915/i915_gem.c | 44 +++++ drivers/gpu/drm/i915/i915_gem_gtt.c | 206 ++++++++++++++++++++++- drivers/gpu/drm/i915/i915_gem_gtt.h | 14 +- drivers/gpu/drm/i915/i915_gem_object.h | 2 + drivers/gpu/drm/i915/i915_pci.c | 29 ++++ drivers/gpu/drm/i915/i915_reg.h | 3 + drivers/gpu/drm/i915/i915_vma.c | 36 ++++ drivers/gpu/drm/i915/intel_pm.c | 12 +- drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 3 +- drivers/gpu/drm/i915/selftests/mock_gem_device.c | 6 + drivers/gpu/drm/i915/selftests/mock_gtt.c | 1 + include/linux/shmem_fs.h | 20 +++ mm/shmem.c | 37 ++-- 15 files changed, 416 insertions(+), 37 deletions(-) -- 2.9.4 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
