On Thu, 2017-04-06 at 12:15 -0700, Rodrigo Vivi wrote:
> Cannonlake is a Intel® Processor containing Intel® HD Graphics
> following Kabylake.
>
> It is Gen10.
>
> Let's start by adding the platform definition based on previous
> platforms but yet as alpha_support.
>
> On following patches we will start adding PCI IDs and the
> platform specific changes.
>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 3 +++
> drivers/gpu/drm/i915/i915_pci.c | 8 ++++++++
> drivers/gpu/drm/i915/intel_device_info.c | 1 +
> 3 files changed, 12 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 2685f12..a357862 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -887,6 +887,7 @@ enum intel_platform {
> INTEL_BROXTON,
> INTEL_KABYLAKE,
> INTEL_GEMINILAKE,
> + INTEL_CANNONLAKE,
> INTEL_MAX_PLATFORMS
> };
>
> @@ -2751,6 +2752,7 @@ static inline struct scatterlist *__sg_next(struct scatterlist *sg)
> #define IS_BROXTON(dev_priv) ((dev_priv)->info.platform == INTEL_BROXTON)
> #define IS_KABYLAKE(dev_priv) ((dev_priv)->info.platform == INTEL_KABYLAKE)
> #define IS_GEMINILAKE(dev_priv) ((dev_priv)->info.platform == INTEL_GEMINILAKE)
> +#define IS_CANNONLAKE(dev_priv) ((dev_priv)->info.platform == INTEL_CANNONLAKE)
> #define IS_MOBILE(dev_priv) ((dev_priv)->info.is_mobile)
> #define IS_HSW_EARLY_SDV(dev_priv) (IS_HASWELL(dev_priv) && \
> (INTEL_DEVID(dev_priv) & 0xFF00) == 0x0C00)
> @@ -2842,6 +2844,7 @@ static inline struct scatterlist *__sg_next(struct scatterlist *sg)
> #define IS_GEN7(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(6)))
> #define IS_GEN8(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(7)))
> #define IS_GEN9(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(8)))
> +#define IS_GEN10(dev_priv) (!!((dev_priv)->info.gen_mask & BIT(9)))
>
> #define IS_LP(dev_priv) (INTEL_INFO(dev_priv)->is_lp)
> #define IS_GEN9_LP(dev_priv) (IS_GEN9(dev_priv) && IS_LP(dev_priv))
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index f87b0c4..a2a4b2f 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -431,6 +431,14 @@
> .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
> };
>
> +static const struct intel_device_info intel_cannonlake_info = {
> + BDW_FEATURES,
> + .is_alpha_support = 1,
> + .platform = INTEL_CANNONLAKE,
> + .gen = 10,
> + .ddb_size = 896,
> +};
> +
I think it makes sense to squash patch 17 with this one. No point in adding
.ddb_size with the wrong value. If there's a reason not squash, I'd say is
better to leave this as zero, so that the WARN_ON(ddb_size == 0) in intel_pm.c
will remind us to fix it. With one of these suggestions,
Reviewed-by: Ander Conselvan de Oliveira <conselvan2@xxxxxxxxx>
> /*
> * Make sure any device matches here are from most specific to most
> * general. For example, since the Quanta match is based on the subsystem
> diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
> index 7d01dfe..6b09a82 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.c
> +++ b/drivers/gpu/drm/i915/intel_device_info.c
> @@ -51,6 +51,7 @@
> PLATFORM_NAME(BROXTON),
> PLATFORM_NAME(KABYLAKE),
> PLATFORM_NAME(GEMINILAKE),
> + PLATFORM_NAME(CANNONLAKE),
> };
> #undef PLATFORM_NAME
>
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