On Tue, Apr 25, 2017 at 04:50:15PM +0300, Mika Kuoppala wrote: > Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> writes: > > > We need to keep track of the last location we ask the hw to read up to > > (RING_TAIL) separately from our last write location into the ring, so > > that in the event of a GPU reset we do not tell the HW to proceed into > > a partially written request (which can happen if that request is waiting > > for an external signal before being executed). > > > > v2: Refactor intel_ring_reset() (Mika) > > > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100144 > > Testcase: igt/gem_exec_fence/await-hang > > Fixes: 821ed7df6e2a ("drm/i915: Update reset path to fix incomplete requests") > > Fixes: d55ac5bf97c6 ("drm/i915: Defer transfer onto execution timeline to actual hw submission") > > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > > Cc: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx> > > Cc: Mika Kuoppala <mika.kuoppala@xxxxxxxxx> > > Reviewed-by: Mika Kuoppala <mika.kuoppala@xxxxxxxxx> Pushed the first 2 to get the bug fix. That just leaves the micro-optimisation of intel_ring_space. -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
