On ke, 2017-04-12 at 10:42 +0100, Chris Wilson wrote: > In the next patch, we will introduce a new cache domain for > differentiating between GTT access and direct WC access. This will > require us to include WC in our write_domain flushes. Rather than > duplicate a third function, combine the existing two into one and > flushing WC writes will then be automatically handled as well. > > v2: Be smarter and clearer by passing in the write domains to flush (Joonas) > > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > Cc: Joonas Lahtinen <joonas.lahtinen@xxxxxxxxxxxxxxx> <SNIP> > @@ -266,7 +266,7 @@ static int check_partial_mapping(struct drm_i915_gem_object *obj, > if (offset >= obj->base.size) > continue; > > - i915_gem_object_flush_gtt_write_domain(obj); > + flush_write_domain(obj, I915_GEM_DOMAIN_CPU); Forgot the tilde, with that; Reviewed-by: Joonas Lahtinen <joonas.lahtinen@xxxxxxxxxxxxxxx> Regards, Joonas -- Joonas Lahtinen Open Source Technology Center Intel Corporation _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
