On ti, 2017-04-11 at 14:47 +0100, Chris Wilson wrote:
> In the next patch, we will introduce a new cache domain for
> differentiating between GTT access and direct WC access. This will
> require us to include WC in our write_domain flushes. Rather than
> duplicate a third function, combine the existing two into one and
> flushing WC writes will then be automatically handled as well.
>
> Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
<SNIP>
> +static inline enum fb_op_origin
> +write_origin(struct drm_i915_gem_object *obj, unsigned int domain)
fb_write_origin? Just for added clarity.
> +{
> + return (domain == I915_GEM_DOMAIN_GTT ?
> + obj->frontbuffer_ggtt_origin : ORIGIN_CPU);
> +}
<SNIP>
> @@ -794,7 +848,7 @@ int i915_gem_obj_prepare_shmem_read(struct drm_i915_gem_object *obj,
> goto out;
> }
>
> - i915_gem_object_flush_gtt_write_domain(obj);
> + flush_write_domain(obj, I915_GEM_DOMAIN_CPU);
Let me tell ya, this reads really confusing. Maybe
flush_write_domain(obj, ~I915_GEM_DOMAIN_CPU);
and call the parameter "mask" instead of "exclude..."
Regards, Joonas
--
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
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