On Thu, Apr 06, 2017 at 08:00:12AM -0700, Oscar Mateo wrote:
> From: Daniele Ceraolo Spurio <daniele.ceraolospurio@xxxxxxxxx>
>
> In such a way that vcs and vcs2 are just two different instances (0 and 1)
> of the same engine class (VIDEO_DECODE_CLASS).
>
> v2: Align the instance types (Tvrtko)
>
> Cc: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx>
> Cc: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
> Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@xxxxxxxxx>
> Signed-off-by: Oscar Mateo <oscar.mateo@xxxxxxxxx>
> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/intel_engine_cs.c | 14 ++++++++++++++
> drivers/gpu/drm/i915/intel_ringbuffer.h | 10 ++++++++++
> 2 files changed, 24 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
> index 854e8e0..49ca7d1 100644
> --- a/drivers/gpu/drm/i915/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/intel_engine_cs.c
> @@ -30,6 +30,8 @@
> const char *name;
> unsigned int exec_id;
> unsigned int hw_id;
> + enum intel_engine_class class;
> + u8 instance;
> u32 mmio_base;
> unsigned irq_shift;
> int (*init_legacy)(struct intel_engine_cs *engine);
> @@ -39,6 +41,8 @@
> .name = "rcs",
> .hw_id = RCS_HW,
> .exec_id = I915_EXEC_RENDER,
> + .class = RENDER_CLASS,
> + .instance = 0,
> .mmio_base = RENDER_RING_BASE,
> .irq_shift = GEN8_RCS_IRQ_SHIFT,
> .init_execlists = logical_render_ring_init,
> @@ -48,6 +52,8 @@
> .name = "bcs",
> .hw_id = BCS_HW,
> .exec_id = I915_EXEC_BLT,
> + .class = COPY_ENGINE_CLASS,
> + .instance = 0,
> .mmio_base = BLT_RING_BASE,
> .irq_shift = GEN8_BCS_IRQ_SHIFT,
> .init_execlists = logical_xcs_ring_init,
> @@ -57,6 +63,8 @@
> .name = "vcs",
> .hw_id = VCS_HW,
> .exec_id = I915_EXEC_BSD,
> + .class = VIDEO_DECODE_CLASS,
> + .instance = 0,
> .mmio_base = GEN6_BSD_RING_BASE,
> .irq_shift = GEN8_VCS1_IRQ_SHIFT,
> .init_execlists = logical_xcs_ring_init,
> @@ -66,6 +74,8 @@
> .name = "vcs2",
> .hw_id = VCS2_HW,
> .exec_id = I915_EXEC_BSD,
> + .class = VIDEO_DECODE_CLASS,
> + .instance = 1,
> .mmio_base = GEN8_BSD2_RING_BASE,
> .irq_shift = GEN8_VCS2_IRQ_SHIFT,
> .init_execlists = logical_xcs_ring_init,
> @@ -75,6 +85,8 @@
> .name = "vecs",
> .hw_id = VECS_HW,
> .exec_id = I915_EXEC_VEBOX,
> + .class = VIDEO_ENHANCEMENT_CLASS,
> + .instance = 0,
> .mmio_base = VEBOX_RING_BASE,
> .irq_shift = GEN8_VECS_IRQ_SHIFT,
> .init_execlists = logical_xcs_ring_init,
> @@ -101,6 +113,8 @@
> engine->hw_id = engine->guc_id = info->hw_id;
> engine->mmio_base = info->mmio_base;
> engine->irq_shift = info->irq_shift;
> + engine->class = info->class;
> + engine->instance = info->instance;
>
> /* Nothing to do here, execute in order of dependencies */
> engine->schedule = NULL;
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index cbe61d3..4ab590b 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -193,6 +193,16 @@ struct intel_engine_cs {
> enum intel_engine_id id;
> unsigned int exec_id;
> unsigned int hw_id;
> +
> + enum intel_engine_class {
> + RENDER_CLASS = 0,
> + VIDEO_DECODE_CLASS = 1,
> + VIDEO_ENHANCEMENT_CLASS = 2,
> + COPY_ENGINE_CLASS = 3,
> + OTHER_CLASS = 4
> + } class;
Hmm, if this 'class' identifiers are related to the hw then maybe we should
move these definitions into i915_reg.h in similar way as it was done in
237ae7c79e26 drm/i915: Don't use enums for hardware engine id
and here just keep class as "u8"
-Michal
> + u8 instance;
> +
> unsigned int guc_id;
> u32 mmio_base;
> unsigned int irq_shift;
> --
> 1.9.1
>
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