On Wed, Apr 05, 2017 at 09:19:49AM +0300, Joonas Lahtinen wrote:
> On ti, 2017-04-04 at 23:11 +0100, Matthew Auld wrote:
> > +++ b/drivers/gpu/drm/i915/i915_pci.c
> > @@ -56,6 +56,10 @@
> > .color = { .degamma_lut_size = 65, .gamma_lut_size = 257 }
> >
> > /* Keep in gen based order, and chronological order within a gen */
> > +
> > +#define GEN_DEFAULT_PAGE_SZ \
> > + .page_size_mask = I915_GTT_PAGE_SIZE_4K
>
> GEN_DEFAULT_PAGE_SIZES
>
> > @@ -346,13 +358,18 @@ static const struct intel_device_info intel_cherryview_info = {
> > .has_aliasing_ppgtt = 1,
> > .has_full_ppgtt = 1,
> > .display_mmio_offset = VLV_DISPLAY_BASE,
> > + .page_size_mask = I915_GTT_PAGE_SIZE_4K | I915_GTT_PAGE_SIZE_64K | I915_GTT_PAGE_SIZE_2M | I915_GTT_PAGE_SIZE_1G,
>
> Split long line.
>
> > GEN_CHV_PIPEOFFSETS,
> > CURSOR_OFFSETS,
> > > CHV_COLORS,
> > };
> >
> > +#define GEN9_DEFAULT_PAGE_SZ \
> > + .page_size_mask = I915_GTT_PAGE_SIZE_4K | I915_GTT_PAGE_SIZE_64K | I915_GTT_PAGE_SIZE_2M | I915_GTT_PAGE_SIZE_1G
>
> GEN9_DEFAULT_PAGE_SIZES, also split long line.
Also not in this patch. First patch is to set everything to the status
quo. Last patch will be to enable the (completed) feature on the
platforms using. In testing, that enabling patch comes early on to check
bisection of the series.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
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