Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> writes: > Use the incoming value from debugfs/i915_wedged to select which engines > to marked as guilty in order to force us to reset those requests > (required to quickly bypass simulated hangs). > > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > Cc: Mika Kuoppala <mika.kuoppala@xxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/i915_debugfs.c | 16 +++++++++++----- > 1 file changed, 11 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c > index dbd97fd52b00..db5d8efd07d1 100644 > --- a/drivers/gpu/drm/i915/i915_debugfs.c > +++ b/drivers/gpu/drm/i915/i915_debugfs.c > @@ -4031,7 +4031,9 @@ i915_wedged_get(void *data, u64 *val) > static int > i915_wedged_set(void *data, u64 val) > { > - struct drm_i915_private *dev_priv = data; > + struct drm_i915_private *i915 = data; > + struct intel_engine_cs *engine; > + unsigned int tmp; > > /* > * There is no safeguard against this debugfs entry colliding > @@ -4041,13 +4043,17 @@ i915_wedged_set(void *data, u64 val) > * while it is writing to 'i915_wedged' > */ > > - if (i915_reset_backoff(&dev_priv->gpu_error)) > + if (i915_reset_backoff(&i915->gpu_error)) > return -EAGAIN; > > - i915_handle_error(dev_priv, val, > - "Manually setting wedged to %llu", val); > + for_each_engine_masked(engine, i915, val, tmp) { > + engine->hangcheck.seqno = intel_engine_get_seqno(engine); > + engine->hangcheck.stalled = true; Can't decide if we should clean the engine mask we pass to i915_handle_error here or not. Well the -1 igt will pass will atleast be visible in logs now. Reviewed-by: Mika Kuoppala <mika.kuoppala@xxxxxxxxx> > + } > + > + i915_handle_error(i915, val, "Manually setting wedged to %llu", val); > > - wait_on_bit(&dev_priv->gpu_error.flags, > + wait_on_bit(&i915->gpu_error.flags, > I915_RESET_HANDOFF, > TASK_UNINTERRUPTIBLE); > > -- > 2.11.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx