On Mon, Mar 27, 2017 at 10:10:54AM +0100, Tvrtko Ursulin wrote: > > On 25/03/2017 20:10, Chris Wilson wrote: > >I noticed that gcc was spilling the CSB to the stack, so rearrange the > >code to be more compact. Spilling in this function is slightly more > >interesting due to the mmio reads acting as memory barriers and so > >end up flushing the stack spills. Still miniscule to having to do at > >least the pair of uncached reads :( > > > >function old new delta > >intel_lrc_irq_handler 1039 878 -161 > > > >Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > >Cc: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx> > >Cc: Mika Kuoppala <mika.kuoppala@xxxxxxxxxxxxxxx> > Looks correct, even I think a bit easier to understand. > > Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx> Thanks for the review, it does feel like a step in the right direction with regards the dance between csb, head, tail and index. Pushed, -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
