> -----Original Message-----
> From: Nikula, Jani
> Sent: Thursday, March 16, 2017 7:00 PM
> To: Ander Conselvan De Oliveira <conselvan2@xxxxxxxxx>; Chauhan,
> Madhav <madhav.chauhan@xxxxxxxxx>; intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> Subject: Re: [PATCH] drm/i915/glk: CDCLK calculation changes for
> glk
>
> On Thu, 16 Mar 2017, Ander Conselvan De Oliveira
> <conselvan2@xxxxxxxxx> wrote:
> > On Thu, 2017-03-16 at 15:10 +0200, Jani Nikula wrote:
> >> On Thu, 16 Mar 2017, "Chauhan, Madhav"
> <madhav.chauhan@xxxxxxxxx> wrote:
> >> > > -----Original Message-----
> >> > > From: Nikula, Jani
> >> > > Sent: Thursday, February 16, 2017 9:03 PM
> >> > > To: Chauhan, Madhav <madhav.chauhan@xxxxxxxxx>; intel-
> >> > > gfx@xxxxxxxxxxxxxxxxxxxxx
> >> > > Cc: Conselvan De Oliveira, Ander
> >> > > <ander.conselvan.de.oliveira@xxxxxxxxx>;
> >> > > Shankar, Uma <uma.shankar@xxxxxxxxx>; Mukherjee, Indranil
> >> > > <indranil.mukherjee@xxxxxxxxx>; Sharma, Shashank
> >> > > <shashank.sharma@xxxxxxxxx>; Chauhan, Madhav
> >> > > <madhav.chauhan@xxxxxxxxx>; ville.syrjala@xxxxxxxxxxxxxxx
> >> > > Subject: Re: [PATCH] drm/i915/glk: CDCLK calculation changes for
> >> > > glk
> >> > >
> >> > > On Thu, 16 Feb 2017, Madhav Chauhan
> <madhav.chauhan@xxxxxxxxx>
> >> > > wrote:
> >> > > > As per BSPEC, valid cdclk values for glk are 79.2, 158.4, 316.8 Mhz.
> >> > > > Practically we can achive only 99% of these cdclk values(HW
> >> > > > team checking on this). So cdclk should be calculated for the
> >> > > > given pixclk as per that otherwise it may lead to screen corruption
> for some scenarios.
> >> > > >
> >> > > > v2: Rebased to new CDLCK code framework
> >> > > >
> >> > > > Signed-off-by: Madhav Chauhan <madhav.chauhan@xxxxxxxxx>
> >> > > > ---
> >> > > > drivers/gpu/drm/i915/intel_cdclk.c | 4 ++--
> >> > > > 1 file changed, 2 insertions(+), 2 deletions(-)
> >> > > >
> >> > > > diff --git a/drivers/gpu/drm/i915/intel_cdclk.c
> >> > > > b/drivers/gpu/drm/i915/intel_cdclk.c
> >> > > > index d643c0c..834df68 100644
> >> > > > --- a/drivers/gpu/drm/i915/intel_cdclk.c
> >> > > > +++ b/drivers/gpu/drm/i915/intel_cdclk.c
> >> > > > @@ -1071,9 +1071,9 @@ static int bxt_calc_cdclk(int max_pixclk)
> >> > > >
> >> > > > static int glk_calc_cdclk(int max_pixclk) {
> >> > > > - if (max_pixclk > 2 * 158400)
> >> > > > + if (max_pixclk > DIV_ROUND_UP(2 * 158400 * 99, 100))
> >> > >
> >> > > Where do we ensure we don't use pixel clock 312841..316800?
> >> > > Clearly we shouldn't use that because we can't guarantee it works,
> right?
> >> >
> >> > Why do we need to ensure that ?? Can you please elaborate more on
> this?
> >> > Here we are finding one of the defined CDCLK value for a pixel
> >> > clock
> >>
> >> I probably had some great idea a month ago when I wrote that, but I
> >> can no longer remember what it was. :(
> >
> > I'm not sure if that is what you meant, but if the hardware can't
> > handle it,
> > intel_compute_max_dotclk() needs to take the 99% limitation into account
> too.
> > I.e., max dot clock would be .99 * 2 * 316800 = 627264.
>
> Yes, thank you!
Ok. Will include this change as well along with additional comments
for explaining 99% usage of cdclk inside glk_calc_cdclk.
Thanks for review.
>
> Jani.
>
> >
> > Ander
> >
> >>
> >> BR,
> >> Jani.
> >>
> >>
> >> > >
> >> > > Before we get the spec update to confirm what to do, I think we
> >> > > need a comment here explaining what's going on.
> >> >
> >> > Will add the following comment, if that's fine, will send the rebased
> patch:
> >> > "For GLK platform, only 99% of the defined CDCLK value can be achieved
> >> > So calculate pixel clock on that basis"
> >> >
> >> > Regards,
> >> > Madhav
> >> > >
> >> > > BR,
> >> > > Jani.
> >> > >
> >> > > > return 316800;
> >> > > > - else if (max_pixclk > 2 * 79200)
> >> > > > + else if (max_pixclk > DIV_ROUND_UP(2 * 79200 * 99, 100))
> >> > > > return 158400;
> >> > > > else
> >> > > > return 79200;
> >> > >
> >> > > --
> >> > > Jani Nikula, Intel Open Source Technology Center
> >>
> >>
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> --
> Jani Nikula, Intel Open Source Technology Center
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