On 2017.03.17 09:42:37 +0000, Chris Wilson wrote:
> On Fri, Mar 17, 2017 at 05:25:35PM +0800, Zhenyu Wang wrote:
> > On 2017.03.13 13:39:18 +0000, Chris Wilson wrote:
> > > On Fri, Mar 10, 2017 at 10:22:38AM +0800, Zhenyu Wang wrote:
> > > > From commit a6508ded2a66 ("drm/i915: Use page coloring to provide the guard
> > > > page at the end of the GTT"), we no longer explicitly subtract guard page
> > > > at end for GGTT address space init, so shouldn't subtract that for vGPU
> > > > balloon too, as that will leave that end page to be available for
> > > > vGPU. Change balloon to cover full range too.
> > > >
> > > > This fixes to use recent drm-intel tip kernel for guest OS. Found by GVT-g
> > > > cmd parser that guest kernel uses end page as scratch then try to run
> > > > MI_STORE_REG_MEM onto it.
> > > >
> > > > v2: remove old comments
> > > >
> > > > Cc: Terrence Xu <terrence.xu@xxxxxxxxx>
> > > > Signed-off-by: Zhenyu Wang <zhenyuw@xxxxxxxxxxxxxxx>
> > > Reviewed-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
> >
> > ping for commit to dinq, as required to run lastest drm-intel in guest.
>
> Applied, I had assumed you would pick up the gvt tree.
oh, no, this depends on i915 change, so should align there.
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