Re: [PATCH i-g-t] tests: Add gem_spin_batch

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Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> writes:

> On Wed, Mar 08, 2017 at 12:44:06PM +0200, Mika Kuoppala wrote:
>> Add gem_spin_batch to test that the dummyload infra
>> is working properly. Can be also act as tool to force
>> a single engine to be busy for controlled period of time.
>> 
>> v2: plenty of igt-fu improvements (Chris)
>> v3: nesting batches for more utilization, epsilon fun (Chris)
>> 
>> Cc: Abdiel Janulgue <abdiel.janulgue@xxxxxxxxxxxxxxx>
>> Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
>> Signed-off-by: Mika Kuoppala <mika.kuoppala@xxxxxxxxx>
>> ---
>>  tests/Makefile.sources |  1 +
>>  tests/gem_spin_batch.c | 85 ++++++++++++++++++++++++++++++++++++++++++++++++++
>>  2 files changed, 86 insertions(+)
>>  create mode 100644 tests/gem_spin_batch.c
>> 
>> diff --git a/tests/Makefile.sources b/tests/Makefile.sources
>> index 6e07d93..1763b67 100644
>> --- a/tests/Makefile.sources
>> +++ b/tests/Makefile.sources
>> @@ -214,6 +214,7 @@ TESTS_progs = \
>>  	gem_unfence_active_buffers \
>>  	gem_unref_active_buffers \
>>  	gem_wait \
>> +	gem_spin_batch \
>>  	gem_workarounds \
>>  	gen3_mixed_blits \
>>  	gen3_render_linear_blits \
>> diff --git a/tests/gem_spin_batch.c b/tests/gem_spin_batch.c
>> new file mode 100644
>> index 0000000..a408fe1
>> --- /dev/null
>> +++ b/tests/gem_spin_batch.c
>> @@ -0,0 +1,85 @@
>> +/*
>> + * Copyright © 2017 Intel Corporation
>> + *
>> + * Permission is hereby granted, free of charge, to any person obtaining a
>> + * copy of this software and associated documentation files (the "Software"),
>> + * to deal in the Software without restriction, including without limitation
>> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
>> + * and/or sell copies of the Software, and to permit persons to whom the
>> + * Software is furnished to do so, subject to the following conditions:
>> + *
>> + * The above copyright notice and this permission notice (including the next
>> + * paragraph) shall be included in all copies or substantial portions of the
>> + * Software.
>> + *
>> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
>> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
>> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
>> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
>> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
>> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
>> + * IN THE SOFTWARE.
>> + *
>> + */
>> +
>> +#include "igt.h"
>> +
>> +#define MAX_ERROR 3 /* % */
>> +
>> +#define assert_within_epsilon(x, ref, tolerance) \
>> +	igt_assert_f(100 * x <= (100 + tolerance) * ref && \
>> +		     100 * x >= (100 - tolerance) * ref, \
>> +		     "'%s' != '%s' (%ld not within %d%% tolerance of %ld)\n", \
>> +		     #x, #ref, (int64_t)x, tolerance, (int64_t)ref)
>> +
>> +static void basic(int fd, unsigned int engine, unsigned int timeout_sec)
>> +{
>> +	const uint64_t timeout_100ms = 100000000LL;
>> +	unsigned long loops = 0;
>> +	igt_spin_t *spin;
>> +	struct timespec tv = { };
>> +	uint64_t elapsed;
>> +
>> +	spin = igt_spin_batch_new(fd, engine, 0);
>> +	while ((elapsed = igt_nsec_elapsed(&tv)) >> 30 < timeout_sec) {
>> +		igt_spin_t *next = igt_spin_batch_new(fd, engine, 0);
>> +
>> +		igt_spin_batch_set_timeout(spin, timeout_100ms);
>> +		gem_sync(fd, spin->handle);
>> +		loops++;
>> +
>> +		igt_spin_batch_free(fd, spin);
>> +		spin = next;
>> +	}
>> +	igt_spin_batch_free(fd, spin);
>> +
>> +	assert_within_epsilon(timeout_100ms * loops, elapsed, MAX_ERROR);
>> +	igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0);
>> +}
>> +
>> +igt_main
>> +{
>> +	const struct intel_execution_engine *e;
>> +	int fd = -1;
>> +
>> +	igt_skip_on_simulation();
>> +
>> +	igt_fixture {
>> +		fd = drm_open_driver(DRIVER_INTEL);
>> +		igt_require_gem(fd);
>> +		igt_fork_hang_detector(fd);
>
> intel_detect_and_clear_missed_interrupts(fd);
>
> And I'm done! :)
> Reviewed-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>

Pushed with the intr check. Thanks for review.
-Mika


> -Chris
>
> -- 
> Chris Wilson, Intel Open Source Technology Centre
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