From: Bing Niu <bing.niu@xxxxxxxxx> under virtualization enviroment, it is possible guest update pipe registers across vblank intervals due to overhead of mmio traps or vm schedule out. However, it is safe since those pipe update happen in virual registers and will not be committed to hardware. suppress that atomic commit error message under virtualization case to avoid confusing user. v2: per ville's comment: return early and against Maarten's patch Signed-off-by: Bing Niu <bing.niu@xxxxxxxxx> --- drivers/gpu/drm/i915/intel_sprite.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c index 375ca91..b7849ca 100644 --- a/drivers/gpu/drm/i915/intel_sprite.c +++ b/drivers/gpu/drm/i915/intel_sprite.c @@ -161,6 +161,7 @@ void intel_pipe_update_end(struct intel_crtc *crtc, struct intel_flip_work *work int scanline_end = intel_get_crtc_scanline(crtc); u32 end_vbl_count = intel_crtc_get_vblank_counter(crtc); ktime_t end_vbl_time = ktime_get(); + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); if (work) { work->flip_queued_vblank = end_vbl_count; @@ -186,6 +187,9 @@ void intel_pipe_update_end(struct intel_crtc *crtc, struct intel_flip_work *work local_irq_enable(); + if(intel_vgpu_active(dev_priv)) + return; + if (crtc->debug.start_vbl_count && crtc->debug.start_vbl_count != end_vbl_count) { DRM_ERROR("Atomic update failure on pipe %c (start=%u end=%u) time %lld us, min %d, max %d, scanline start %d, end %d\n", -- 2.7.4 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx