On Mon, 20 Feb 2017 15:08:38 +0100 Hans de Goede <hdegoede@xxxxxxxxxx> wrote: > Now that we are no longer bound to the drm_panel_ callbacks, call > MIPI_SEQ_POWER_ON/OFF at the proper place. > > Signed-off-by: Hans de Goede <hdegoede@xxxxxxxxxx> Reviewed-by: Bob Paauwe <bob.j.paauwe@xxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_dsi.c | 10 ++++------ > 1 file changed, 4 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c > index 4ebf308..de0558b 100644 > --- a/drivers/gpu/drm/i915/intel_dsi.c > +++ b/drivers/gpu/drm/i915/intel_dsi.c > @@ -651,10 +651,10 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder, > > intel_dsi_prepare(encoder, pipe_config); > > - /* Panel Enable over CRC PMIC */ > + /* Power on, try both CRC pmic gpio and VBT */ > if (intel_dsi->gpio_panel) > gpiod_set_value_cansleep(intel_dsi->gpio_panel, 1); > - > + intel_dsi_exec_vbt_sequence(intel_dsi, MIPI_SEQ_POWER_ON); > msleep(intel_dsi->panel_on_delay); > > if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { > @@ -669,7 +669,6 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder, > /* put device in ready state */ > intel_dsi_device_ready(encoder); > > - intel_dsi_exec_vbt_sequence(intel_dsi, MIPI_SEQ_POWER_ON); > intel_dsi_exec_vbt_sequence(intel_dsi, MIPI_SEQ_DEASSERT_RESET); > intel_dsi_exec_vbt_sequence(intel_dsi, MIPI_SEQ_INIT_OTP); > > @@ -787,11 +786,10 @@ static void intel_dsi_post_disable(struct intel_encoder *encoder, > } > > intel_dsi_exec_vbt_sequence(intel_dsi, MIPI_SEQ_ASSERT_RESET); > - intel_dsi_exec_vbt_sequence(intel_dsi, MIPI_SEQ_POWER_OFF); > > + /* Power off, try both CRC pmic gpio and VBT */ > msleep(intel_dsi->panel_off_delay); > - > - /* Panel Disable over CRC PMIC */ > + intel_dsi_exec_vbt_sequence(intel_dsi, MIPI_SEQ_POWER_OFF); > if (intel_dsi->gpio_panel) > gpiod_set_value_cansleep(intel_dsi->gpio_panel, 0); > -- -- Bob Paauwe Bob.J.Paauwe@xxxxxxxxx IOTG / PED Software Organization Intel Corp. Folsom, CA (916) 356-6193 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx