On 23/02/2017 21:03, Chris Wilson wrote:
On Thu, Feb 23, 2017 at 11:44:18AM -0800, Michel Thierry wrote:
[snip]
+static int gen8_emit_stop_watchdog(struct drm_i915_gem_request *req) +{ + struct intel_engine_cs *engine = req->engine; + u32 *cs; + + cs = intel_ring_begin(req, 4); + if (IS_ERR(cs)) + return PTR_ERR(cs); + + *cs++ = MI_LOAD_REGISTER_IMM(1); + *cs++ = i915_mmio_reg_offset(RING_CNTR(engine->mmio_base)); + + switch (engine->id) { + default: + WARN(1, "%s does not support watchdog timeout!\n", + engine->name); + /* default to render engine */Just GEM_BUG_ON(engine->id == BCS); if (engine->id == RCS) *cs++ = GEN8_RCS_WATCHDOG_DISABLE; else *cs++ = GEN8_XCS_WATCHDOG_DISABLE;
I'd go further and store it in the engine eg. "*cs++ = engine->watchdog_disable_cmd" or something. I think that's better than engines with identity crisis. :)
Regards, Tvrtko _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
