On Wed, Feb 22, 2017 at 06:54:24PM +0200, Mika Kuoppala wrote: > The pdp rewrite to force tlb flush is only a 32bit ppgtt > trick. That should not be needed with 48bit ppgtt. > > Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > Signed-off-by: Mika Kuoppala <mika.kuoppala@xxxxxxxxx> > --- > drivers/gpu/drm/i915/i915_gem_gtt.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c > index 269a8f1..791cb81 100644 > --- a/drivers/gpu/drm/i915/i915_gem_gtt.c > +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c > @@ -1103,7 +1103,8 @@ static int gen8_ppgtt_alloc_pdp(struct i915_address_space *vm, > gen8_ppgtt_set_pdpe(vm, pdp, pd, pdpe); > pdp->used_pdpes++; > > - mark_tlbs_dirty(i915_vm_to_ppgtt(vm)); > + if (!i915_vm_is_48bit(vm)) > + mark_tlbs_dirty(i915_vm_to_ppgtt(vm)); Just thinking the relative merits of unconditionally setting bits vs a branch miss. It's immaterial as this should not be a hotpath! I'd like the idea of perhaps calling this mark_pdp_dirty), and have mark_pml4_dirty, mark_pte_dirty() etc. But they're not used, so pretty pointless. -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
