Let intel_guc_fetch_fw() focus on determining and fetching the correct firmware. This patch introduces intel_uc_sanitize_options() that is called from intel_sanitize_options(). Then, if we have GuC, we can call intel_guc_fetch_fw() conditionally and we do not have to do the internal checks. v2: fix comment, notify when nuking GuC explicitly enabled (M. Wajdeczko) v3: fix comment again, change the nuke message (M. Wajdeczko) Cc: Michal Winiarski <michal.winiarski@xxxxxxxxx> Cc: Michal Wajdeczko <michal.wajdeczko@xxxxxxxxx> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@xxxxxxxxx> Signed-off-by: Arkadiusz Hiler <arkadiusz.hiler@xxxxxxxxx> --- drivers/gpu/drm/i915/i915_drv.c | 2 ++ drivers/gpu/drm/i915/intel_guc_loader.c | 16 +--------------- drivers/gpu/drm/i915/intel_uc.c | 27 ++++++++++++++++++++++++++- drivers/gpu/drm/i915/intel_uc.h | 1 + 4 files changed, 30 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 078ac3e..2559ada 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -993,6 +993,8 @@ static void intel_sanitize_options(struct drm_i915_private *dev_priv) i915.semaphores = intel_sanitize_semaphores(dev_priv, i915.semaphores); DRM_DEBUG_DRIVER("use GPU semaphores? %s\n", yesno(i915.semaphores)); + + intel_uc_sanitize_options(dev_priv); } /** diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c index 110dfd1..e74c127 100644 --- a/drivers/gpu/drm/i915/intel_guc_loader.c +++ b/drivers/gpu/drm/i915/intel_guc_loader.c @@ -588,7 +588,7 @@ int intel_guc_init_hw(struct drm_i915_private *dev_priv) /** - * intel_guc_fetch_fw() - define parameters and fetch firmware + * intel_guc_fetch_fw() - determine and fetch firmware * @guc: intel_guc struct * * Called early during driver load, but after GEM is initialised. @@ -601,17 +601,6 @@ void intel_guc_fetch_fw(struct intel_guc *guc) struct drm_i915_private *dev_priv = guc_to_i915(guc); const char *fw_path; - if (!HAS_GUC(dev_priv)) { - i915.enable_guc_loading = 0; - i915.enable_guc_submission = 0; - } else { - /* A negative value means "use platform default" */ - if (i915.enable_guc_loading < 0) - i915.enable_guc_loading = HAS_GUC_UCODE(dev_priv); - if (i915.enable_guc_submission < 0) - i915.enable_guc_submission = HAS_GUC_SCHED(dev_priv); - } - if (!HAS_GUC_UCODE(dev_priv)) { fw_path = NULL; } else if (IS_SKYLAKE(dev_priv)) { @@ -634,9 +623,6 @@ void intel_guc_fetch_fw(struct intel_guc *guc) guc->fw.fetch_status = INTEL_UC_FIRMWARE_NONE; guc->fw.load_status = INTEL_UC_FIRMWARE_NONE; - /* Early (and silent) return if GuC loading is disabled */ - if (!i915.enable_guc_loading) - return; if (fw_path == NULL) return; if (*fw_path == '\0') diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c index 222a928..9355907 100644 --- a/drivers/gpu/drm/i915/intel_uc.c +++ b/drivers/gpu/drm/i915/intel_uc.c @@ -29,6 +29,27 @@ static void uc_fetch_fw(struct drm_i915_private *dev_priv, struct intel_uc_fw *uc_fw); +void intel_uc_sanitize_options(struct drm_i915_private *dev_priv) +{ + if (!HAS_GUC(dev_priv)) { + if (i915.enable_guc_loading > 0) + DRM_INFO("Ignoring GuC options, no hardware"); + + i915.enable_guc_loading = 0; + i915.enable_guc_submission = 0; + } else { + /* A negative value means "use platform default" */ + if (i915.enable_guc_loading < 0) + i915.enable_guc_loading = HAS_GUC_UCODE(dev_priv); + if (i915.enable_guc_submission < 0) + i915.enable_guc_submission = HAS_GUC_SCHED(dev_priv); + + /* can't enable guc submission without guc loaded */ + if (!i915.enable_guc_loading) + i915.enable_guc_submission = 0; + } +} + void intel_uc_init_early(struct drm_i915_private *dev_priv) { mutex_init(&dev_priv->guc.send_mutex); @@ -36,8 +57,12 @@ void intel_uc_init_early(struct drm_i915_private *dev_priv) void intel_uc_fetch_fw(struct drm_i915_private *dev_priv) { + if (!i915.enable_guc_loading) + return; + dev_priv->huc.fw.fetch = uc_fetch_fw; - intel_huc_fetch_fw(&dev_priv->huc); + if (HAS_HUC_UCODE(dev_priv)) + intel_huc_fetch_fw(&dev_priv->huc); dev_priv->guc.fw.fetch = uc_fetch_fw; intel_guc_fetch_fw(&dev_priv->guc); diff --git a/drivers/gpu/drm/i915/intel_uc.h b/drivers/gpu/drm/i915/intel_uc.h index b9d2230..cf5d0f4 100644 --- a/drivers/gpu/drm/i915/intel_uc.h +++ b/drivers/gpu/drm/i915/intel_uc.h @@ -186,6 +186,7 @@ struct intel_huc { }; /* intel_uc.c */ +void intel_uc_sanitize_options(struct drm_i915_private *dev_priv); void intel_uc_init_early(struct drm_i915_private *dev_priv); void intel_uc_fetch_fw(struct drm_i915_private *dev_priv); int intel_guc_send(struct intel_guc *guc, const u32 *action, u32 len); -- 2.9.3 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx