On Thu, Feb 16, 2017 at 01:26:58PM +0000, Tvrtko Ursulin wrote: > > > On 16/02/2017 13:17, Mika Kuoppala wrote: > >Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> writes: > > > >>If an interrupt has been posted, and we were spinning on the active > >>seqno waiting for it to advance but it did not, then we can expect that > >>it will not see its advance in the immediate future > > > >Why we can expect this? > > Maybe it should be "if (engine->irq_seqno_barrier && test_bit(...))" > if my thinking is right that this expectation applies on platforms > with slow barriers? True, those others don't do the clear. And even where we have the barrier, we only sometimes clear the bit (we interpret the bit to really mean whether or not we have applied the barrier). That leaves me with: unsinged int irq_count = atomic_read(&req->engine->irq_count); ... if (atomic_read(&req->engine->irq_count) != irq_count)) break; Based on the new breadcrumbs hang/waitcheck. -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
