On Fri, 2017-02-03 at 15:11 +0200, Ander Conselvan de Oliveira wrote:
> In Geminilake, the degamma table is enabled or disabled by the pipe CSC
> enable bit, so its active even when running in the legacy gamma mode.
> So always set sane values for that table, since the default value is all
> zeroes.
>
> This fixes blank screens after a suspend/resume cycle while legacy gamma
> is in use.
Ville, any comments on this? This is the only thing preventing me from merging
the other patch that flips the switch.
Thanks,
Ander
>
> Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/intel_color.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_color.c b/drivers/gpu/drm/i915/intel_color.c
> index 82e1809..c221891 100644
> --- a/drivers/gpu/drm/i915/intel_color.c
> +++ b/drivers/gpu/drm/i915/intel_color.c
> @@ -453,12 +453,13 @@ static void glk_load_luts(struct drm_crtc_state *state)
> > struct intel_crtc_state *intel_state = to_intel_crtc_state(state);
> > enum pipe pipe = to_intel_crtc(crtc)->pipe;
>
> > + glk_load_degamma_lut(state);
> +
> > if (crtc_state_is_legacy(state)) {
> > haswell_load_luts(state);
> > return;
> > }
>
> > - glk_load_degamma_lut(state);
> > bdw_load_lut(state, 0, (struct drm_color_lut *) state->gamma_lut,
> > INTEL_INFO(dev_priv)->color.gamma_lut_size, 0);
>
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