Just recording a couple of BUG_ON for posterity, would be nice additions
to this patch:
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 11d355d314e1..702c023cd502 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -2264,6 +2264,7 @@ u32 *intel_ring_begin(struct drm_i915_gem_request *req, int num_dwords)
ring->space -= remain_actual;
}
+ GEM_BUG_ON(ring->tail > ring->size - bytes);
out = (u32 *)(ring->vaddr + ring->tail);
ring->tail += bytes;
ring->space -= bytes;
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 896838ca502c..117e1e735fc7 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -526,6 +526,7 @@ static inline u32 intel_ring_offset(struct intel_ring *ring, void *addr)
{
/* Don't write ring->size (equivalent to 0) as that hangs some GPUs. */
u32 offset = addr - ring->vaddr;
+ GEM_BUG_ON(offset > ring->size);
return offset & (ring->size - 1);
}
On Wed, Feb 08, 2017 at 02:14:34PM +0000, Tvrtko Ursulin wrote:
> @@ -862,10 +863,9 @@ void __i915_add_request(struct drm_i915_gem_request *request, bool flush_caches)
> * GPU processing the request, we never over-estimate the
> * position of the ring's HEAD.
> */
> - err = intel_ring_begin(request, engine->emit_breadcrumb_sz);
> - GEM_BUG_ON(err);
> request->postfix = ring->tail;
> - ring->tail += engine->emit_breadcrumb_sz * sizeof(u32);
> + out = intel_ring_begin(request, engine->emit_breadcrumb_sz);
> + GEM_BUG_ON(IS_ERR(out));
A test for BAT :)
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
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