>-----Original Message----- >From: Intel-gfx [mailto:intel-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx] On Behalf Of >Jani Nikula >Sent: Wednesday, February 8, 2017 4:41 PM >To: Srinivas, Vidya <vidya.srinivas@xxxxxxxxx>; intel- >gfx@xxxxxxxxxxxxxxxxxxxxx >Subject: Re: [PATCH 01/14] drm/i915: Check for platform specific >GPIO config > >On Wed, 08 Feb 2017, "Srinivas, Vidya" <vidya.srinivas@xxxxxxxxx> wrote: >>> -----Original Message----- >>> From: Jani Nikula [mailto:jani.nikula@xxxxxxxxxxxxxxx] >>> Sent: Wednesday, February 8, 2017 4:11 PM >>> To: Srinivas, Vidya <vidya.srinivas@xxxxxxxxx>; intel- >>> gfx@xxxxxxxxxxxxxxxxxxxxx >>> Subject: RE: [PATCH 01/14] drm/i915: Check for platform >>> specific GPIO config >>> >>> On Wed, 08 Feb 2017, "Srinivas, Vidya" <vidya.srinivas@xxxxxxxxx> wrote: >>> >> -----Original Message----- >>> >> From: Jani Nikula [mailto:jani.nikula@xxxxxxxxxxxxxxx] >>> >> Sent: Monday, January 9, 2017 3:48 PM >>> >> To: Srinivas, Vidya <vidya.srinivas@xxxxxxxxx>; intel- >>> >> gfx@xxxxxxxxxxxxxxxxxxxxx >>> >> Subject: Re: [PATCH 01/14] drm/i915: Check for >>> >> platform specific GPIO config >>> >> >>> >> On Mon, 09 Jan 2017, Vidya Srinivas <vidya.srinivas@xxxxxxxxx> wrote: >>> >> > From: Uma Shankar <uma.shankar@xxxxxxxxx> >>> >> > >>> >> > Panel GPIO control should be done based on platform. Add a check >>> >> > to restrict VLV and CHT specific GPIO confirguration, so that >>> >> > they dont apply to other platforms. >>> >> >>> >> There are no code paths that would have >>> >> dev_priv->vbt.dsi.config->pwm_blc == PPS_BLC_PMIC on platforms >>> >> other than VLV/CVH. >>> > This particular field is by default 0 which triggers a redundant >>> > gpio get operation for BXT. Hence limiting this to BYT/CHT platforms. >>> >>> What do you mean by default 0? Are you saying that you have machines >>> that have a VBT which indicate they have PMIC backlight control when >>> they in fact don't? >> >> Sorry, what I meant is PPS_BLC_PMIC is 0. So even if the VBT field is >> not changed it will still become true causing the condition to pass. > >In other words, the VBT contains PPS_BLC_PMIC for a machine that should >not use PMIC. In yet other words, the VBT contains incorrect information. >Right? > Hi Jani, In this case, I guess the design for this value itself is wrong. A value of 0 is a valid value from driver/vbt perspective (basically signifies some logical entity). Thus if we don't touch this field in VBT, it will still have 0 as a value (un-initialized). Driver will consider it to be right and will go ahead with GPIO get calls. Ideally this should start from index as 1 or a default value of -1 was needed. In BYT/CHT, most platforms will be using that hence things were fine. If a board design needed other value, VBT field would have been updated. But this is not at all needed for platforms beyond BYT/CHT, hence this change was limited to those platforms. Regards, Uma Shankar >BR, >Jani. > > >>> >>> BR, >>> Jani. >>> >>> >>> >>> > >>> > Regards >>> > Vidya >>> >> >>> >> BR, >>> >> Jani. >>> >> >>> >> > >>> >> > Signed-off-by: Uma Shankar <uma.shankar@xxxxxxxxx> >>> >> > --- >>> >> > drivers/gpu/drm/i915/intel_dsi.c | 3 ++- >>> >> > 1 file changed, 2 insertions(+), 1 deletion(-) >>> >> > >>> >> > diff --git a/drivers/gpu/drm/i915/intel_dsi.c >>> >> > b/drivers/gpu/drm/i915/intel_dsi.c >>> >> > index 16732e7..27d8f95 100644 >>> >> > --- a/drivers/gpu/drm/i915/intel_dsi.c >>> >> > +++ b/drivers/gpu/drm/i915/intel_dsi.c >>> >> > @@ -1560,7 +1560,8 @@ void intel_dsi_init(struct >>> >> > drm_i915_private >>> >> *dev_priv) >>> >> > * In case of BYT with CRC PMIC, we need to use GPIO for >>> >> > * Panel control. >>> >> > */ >>> >> > - if (dev_priv->vbt.dsi.config->pwm_blc == PPS_BLC_PMIC) { >>> >> > + if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) >&& >>> >> > + (dev_priv->vbt.dsi.config->pwm_blc == >PPS_BLC_PMIC)) { >>> >> > intel_dsi->gpio_panel = >>> >> > gpiod_get(dev->dev, "panel", >GPIOD_OUT_HIGH); >>> >> >>> >> -- >>> >> Jani Nikula, Intel Open Source Technology Center >>> >>> -- >>> Jani Nikula, Intel Open Source Technology Center > >-- >Jani Nikula, Intel Open Source Technology Center >_______________________________________________ >Intel-gfx mailing list >Intel-gfx@xxxxxxxxxxxxxxxxxxxxx >https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
