On Tue, Feb 07, 2017 at 05:54:10PM +0200, Mika Kuoppala wrote: > Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> writes: > > > Following a reset, the context and page directory registers are lost. > > However, the queue of requests that we resubmit after the reset may > > depend upon them - the registers are restored from a context image, but > > that restore may be inhibited and may simply be absent from the request > > if it was in the middle of a sequence using the same context. If we > > prime the CCID/PD registers with the first request in the queue (even > > for the hung request), we prevent invalid memory access for the > > following requests (and continually hung engines). > > > > v2: Magic BIT(8), reserved for future use but still appears unused. > > v3: Some commentary on handling innocent vs guilty requests > > v4: Add a wait for PD_BASE fetch. The reload appears to be instant on my > > Ivybridge, but this bit probably exists for a reason. > > > > Fixes: 821ed7df6e2a ("drm/i915: Update reset path to fix incomplete requests") > > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > > Cc: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx> > > Cc: Mika Kuoppala <mika.kuoppala@xxxxxxxxx> > > Reviewed-by: Mika Kuoppala <mika.kuoppala@xxxxxxxxx> Thanks very much for the review, pushed as this fixes a reproducible hang when combined with redundant MI_SET_CONTEXT elimination. -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx