Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> writes: > As we now flag when the GPU signals a context-switch and do not read the > status register before we see that signal, we do not have to ensure that > it is cleared upon reset (and can leave it to the GPU to reset it from > the power context). > > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > Cc: Mika Kuoppala <mika.kuoppala@xxxxxxxxx> > Cc: Tvrtko Ursulin <tursulin@xxxxxxxxxxx> Reviewed-by: Mika Kuoppala <mika.kuoppala@xxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_lrc.c | 2 -- > 1 file changed, 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c > index 0e99d53d5523..753458452997 100644 > --- a/drivers/gpu/drm/i915/intel_lrc.c > +++ b/drivers/gpu/drm/i915/intel_lrc.c > @@ -1317,7 +1317,6 @@ static int gen9_init_render_ring(struct intel_engine_cs *engine) > static void reset_common_ring(struct intel_engine_cs *engine, > struct drm_i915_gem_request *request) > { > - struct drm_i915_private *dev_priv = engine->i915; > struct execlist_port *port = engine->execlist_port; > struct intel_context *ce = &request->ctx->engine[engine->id]; > > @@ -1344,7 +1343,6 @@ static void reset_common_ring(struct intel_engine_cs *engine, > return; > > /* Catch up with any missed context-switch interrupts */ > - I915_WRITE(RING_CONTEXT_STATUS_PTR(engine), _MASKED_FIELD(0xffff, 0)); > if (request->ctx != port[0].request->ctx) { > i915_gem_request_put(port[0].request); > port[0] = port[1]; > -- > 2.11.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx