On Sat, 21 Jan 2017, Manasi Navare <manasi.d.navare@xxxxxxxxx> wrote: > v4: > * Remove redundant single bit defs (Jani Nikula) > v3: > * Fix the conventions in bit definitions (Jani Nikula) > v2: > * Add all the other DP Complianec TEST register defs (Jani Nikula) > Cc: dri-devel@xxxxxxxxxxxxxxxxxxxxx > Cc: Jani Nikula <jani.nikula@xxxxxxxxxxxxxxx> > Cc: Daniel Vetter <daniel.vetter@xxxxxxxxx> > Cc: Ville Syrjala <ville.syrjala@xxxxxxxxxxxxxxx> > Signed-off-by: Manasi Navare <manasi.d.navare@xxxxxxxxx> Reviewed-by: Jani Nikula <jani.nikula@xxxxxxxxx> Dave, ack on merging this through drm-intel to not require a backmerge for the follow-up patches? > --- > include/drm/drm_dp_helper.h | 57 +++++++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 57 insertions(+) > > diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h > index 0468135..ba89295 100644 > --- a/include/drm/drm_dp_helper.h > +++ b/include/drm/drm_dp_helper.h > @@ -417,6 +417,63 @@ > #define DP_TEST_LANE_COUNT 0x220 > > #define DP_TEST_PATTERN 0x221 > +# define DP_NO_TEST_PATTERN 0x0 > +# define DP_COLOR_RAMP 0x1 > +# define DP_BLACK_AND_WHITE_VERTICAL_LINES 0x2 > +# define DP_COLOR_SQUARE 0x3 > + > +#define DP_TEST_H_TOTAL_HI 0x222 > +#define DP_TEST_H_TOTAL_LO 0x223 > + > +#define DP_TEST_V_TOTAL_HI 0x224 > +#define DP_TEST_V_TOTAL_LO 0x225 > + > +#define DP_TEST_H_START_HI 0x226 > +#define DP_TEST_H_START_LO 0x227 > + > +#define DP_TEST_V_START_HI 0x228 > +#define DP_TEST_V_START_LO 0x229 > + > +#define DP_TEST_HSYNC_HI 0x22A > +# define DP_TEST_HSYNC_POLARITY (1 << 7) > +# define DP_TEST_HSYNC_WIDTH_HI_MASK (127 << 0) > +#define DP_TEST_HSYNC_WIDTH_LO 0x22B > + > +#define DP_TEST_VSYNC_HI 0x22C > +# define DP_TEST_VSYNC_POLARITY (1 << 7) > +# define DP_TEST_VSYNC_WIDTH_HI_MASK (127 << 0) > +#define DP_TEST_VSYNC_WIDTH_LO 0x22D > + > +#define DP_TEST_H_WIDTH_HI 0x22E > +#define DP_TEST_H_WIDTH_LO 0x22F > + > +#define DP_TEST_V_HEIGHT_HI 0x230 > +#define DP_TEST_V_HEIGHT_LO 0x231 > + > +#define DP_TEST_MISC0 0x232 > +# define DP_TEST_SYNC_CLOCK (1 << 0) > +# define DP_TEST_COLOR_FORMAT_MASK (3 << 1) > +# define DP_TEST_COLOR_FORMAT_SHIFT 1 > +# define DP_COLOR_FORMAT_RGB (0 << 1) > +# define DP_COLOR_FORMAT_YCbCr422 (1 << 1) > +# define DP_COLOR_FORMAT_YCbCr444 (2 << 1) > +# define DP_TEST_DYNAMIC_RANGE_CEA (1 << 3) > +# define DP_TEST_YCBCR_COEFFICIENTS (1 << 4) > +# define DP_YCBCR_COEFFICIENTS_ITU601 (0 << 4) > +# define DP_YCBCR_COEFFICIENTS_ITU709 (1 << 4) > +# define DP_TEST_BIT_DEPTH_MASK (7 << 5) > +# define DP_TEST_BIT_DEPTH_SHIFT 5 > +# define DP_TEST_BIT_DEPTH_6 (0 << 5) > +# define DP_TEST_BIT_DEPTH_8 (1 << 5) > +# define DP_TEST_BIT_DEPTH_10 (2 << 5) > +# define DP_TEST_BIT_DEPTH_12 (3 << 5) > +# define DP_TEST_BIT_DEPTH_16 (4 << 5) > + > +#define DP_TEST_MISC1 0x233 > +# define DP_TEST_REFRESH_DENOMINATOR (1 << 0) > +# define DP_TEST_INTERLACED (1 << 1) > + > +#define DP_TEST_REFRESH_RATE_NUMERATOR 0x234 > > #define DP_TEST_CRC_R_CR 0x240 > #define DP_TEST_CRC_G_Y 0x242 -- Jani Nikula, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
