Re: [PATCH] drm/i915: reinstate call to trace_i915_vma_bind

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On Fri, Jan 20, 2017 at 01:35:21PM -0800, Daniele Ceraolo Spurio wrote:
> 
> 
> On 20/01/17 13:28, Chris Wilson wrote:
> >On Fri, Jan 20, 2017 at 01:16:13PM -0800, Daniele Ceraolo Spurio wrote:
> >>Ping. can anyone review/comment on this?
> >>
> >>Thanks,
> >>Daniele
> >>
> >>On 12/01/17 14:21, daniele.ceraolospurio@xxxxxxxxx wrote:
> >>>From: Daniele Ceraolo Spurio <daniele.ceraolospurio@xxxxxxxxx>
> >>>
> >>>The call went away in:
> >>>
> >>>commit 3b16525cc4c1a43e9053cfdc414356eea24bdfad
> >>>Author: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
> >>>Date:   Thu Aug 4 16:32:25 2016 +0100
> >>>
> >>>   drm/i915: Split insertion/binding of an object into the VM
> >>>
> >>>It is useful to have this trace as it pairs nicely with the vma_unbind
> >>>one to track vma activity.
> >>>Added inside the i915_vma_bind function (was outside before) to keep a
> >>>similar placement as trace_i915_vma_unbind.
> >>>
> >>>Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
> >>>Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@xxxxxxxxx>
> >>>---
> >>>drivers/gpu/drm/i915/i915_vma.c | 1 +
> >>>1 file changed, 1 insertion(+)
> >>>
> >>>diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
> >>>index b74eeb7..b593748 100644
> >>>--- a/drivers/gpu/drm/i915/i915_vma.c
> >>>+++ b/drivers/gpu/drm/i915/i915_vma.c
> >>>@@ -207,6 +207,7 @@ int i915_vma_bind(struct i915_vma *vma, enum i915_cache_level cache_level,
> >>>			return ret;
> >>>	}
> >>>
> >>>+	trace_i915_vma_bind(vma, flags);
> >
> >We need it but that's not the information being used in the bind.
> >(I know that's what it used to be, but it's a long time since it was
> >correct.)
> >
> 
> would s/flags/bind_flags/ be enough or do you have any other info in
> mind that you want to pass (e.g. vma->flags)?

Bind flags is more suitable, and will do for the moment. It's a little
bit more complicated since the actual bind may be more than the flags we
set. Bleh.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre
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